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MSP430FR2433: Problem with ADC sampling frequency

Part Number: MSP430FR2433

I am working on a project which uses PWM wave as the ADC trigger and I can adjust the sampling frequency by changing the pulse width of the PWM wave. The conversion result will be stored in the registers ADCMEM0 in the board and in my code the data in the ADCMEM0 is given to a variable named ADC_Result during the Interrupt Service Routing(ISR). However, no matter how I change the pulse width I could only get few samples during one period(I tried both high frequency wave and low frequency wave) which means the exact sampling frequency is extremely low. Does anybody know how to solve this problem?

  • The time required to perform a conversion depends on the ADC configuration. Things like the clock source, clock divider, and sampling time. You will have to show your ADC configuration and timer since you say it is the trigger.

  • Hello David, thanks for ur reply, my adc configuration and the timer is as below, could u pls have a look?

    // Configure ADC;

        ADCCTL0 = ADCSHT_2 | ADCON;                         // ADCON

        ADCCTL1 = ADCSHP | ADCSHS_2 | ADCSSEL_1 | ADCCONSEQ_2;          // Rpt single ch; ACLK for ADCCLK; TA1.1 trigger

        ADCCTL2 = ADCRES;                                   // 10-bit conversion results

        ADCMCTL0 = ADCINCH_1 | ADCSREF_1;                   // Vref 1.5v, A1

        ADCHI = High_Threshold;                             // Window Comparator Hi-threshold

        ADCLO = Low_Threshold;                              // Window Comparator Lo-threshold

        ADCIE |= ADCHIIE | ADCLOIE | ADCINIE;               // Enable ADC conv complete interrupt

     // Configure ADC timer trigger TA1.1

        TA1CCR0 = 16384-1;                                  // PWM Period

        TA1CCR1 = 8192-1;                                   // Duty cycle TA1.1

        TA1CCTL1 = OUTMOD_3;                                // TA1CCR1 set/reset mode

        TA1CTL = TASSEL_1 | MC_1 | TACLR;                   // ACLK, up mode

        ADCCTL0 |= ADCENC;                                  // Enable conversion

    The trigger is set to take a sample every 0.5s

  • Using ACLK for the ADC is almost certain to cause trouble as the minimum frequency in order to meet ADC specifications is 450KHz. See data sheet.

    This appears to be setup to perform one conversion per trigger. The timer period (CCR0) controls that.

  • You can't control the sample rate using duty cycle since there's only one edge per period regardless of duty. You can control it using the PWM frequency (CCR0).

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