MSP430FR2633: Using the clock sources of the MSP430FR2633 to clock a TLV320DAC3203

That internal clock for Captivate seems can' t be output external. 

Thanks Gary,
I was hoping for a "miracle", but it seems, I have to look for an oscillator for the DAC3203 and leave the FR2633 alone with the own clocks.

Can you give me a hint, besides all the information I could already find (SLAA892, for instance) for a suitable clock source?

Is there any IC from Ti doing the job?

Thanks for the help and best regards!

Gustavo

I changed this thread to our oscillator team for comments

Hi Vicente, thenks for springin in!

In the mean time, I am a little further, but still unsure.

The TLV320DAC3203 could work with an external clocl source from as slow as 2.8224 MHz.
In my board, I am doing this with the SMCLK from the MSP430FR2633.

However, the LPMx modi from the MSP430FR2633 stopt MCLK and SMCLK except by LPM0.
I could redesign the board to fit a crystal, but the problem now (and I discovered it yesterday) is the shortage on crystals and Osc ICs.

I do not really need speed. The MSP is initialising the DAC and then goes into a wait status, looking for touchs. These occurs sporadically, at about 1% of the time.

So, I figured out, if the MSP works with a MCLK from 2.8224 MHz (or a multiple of it) and SMCLK can be  2.8224 MHz, the consumption would be in LPM0 anyway very low.
Am I wright with this?

I have changed the function 'BSP_configureMCU(void);' from the Captivate-Project into this:

void BSP_configureMCU(void)
{
    uint8_t ui8LFOsc = CS_XT1CLK_SELECT;

    // P1 and P2 configuration code comes here

    // Clear port lock...
    PM5CTL0 &= ~LOCKLPM5;

    // No need to configure FRAM wait state, because under 16 MHz.

    // Attempt to start the low-frequency crystal oscillator... In case I do use one once, you never know.
    MAP_CS_setExternalClockSource(XT1_OSC_FREQ);
    
    // Check if crystal is present and switch to internal 32kHz reference oscillator if not...
    if (CS_turnOnXT1LFWithTimeout(CS_XT1_DRIVE_0, XT1_OSC_TIMEOUT) == STATUS_FAIL)
    {
        ui8LFOsc = CS_REFOCLK_SELECT;
    }

    // Set DCO frequency range to 2 MHz
    CSCTL1 = DCORSEL_1; 

    // Set DCO frequency trim to default
    CSCTL1 |= DCOFTRIMEN;  // Enable frequency trim
    CSCTL1 &= ~DCOFTRIM;   // Default trim value

    // Enable modulation
    CSCTL0 &= ~DISMOD;   

    // Set MCLK and SMCLK source to DCOCLK
    CSCTL2 |= SELM__DCOCLK | SELS__DCOCLK;

    // Set divider for SMCLK to achieve desired frequency
    CSCTL3 |= DIVS__1; // DIVS__1 = no division (SMCLK = DCOCLK)

    // Lock CS registers
    CSCTL0_H = 0;
}

Do you think, this could do the job, or am I missing further steps?

Thanks for taking care and

best regards,

Gustavo