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MSP430FR2433: MSP low-power microcontroller forum

Part Number: MSP430FR2433

Hello,

I have a question about MSP430 clock initialization
The file name I am referring to is "msp430fr243x_CS_03.c".

・How was the value (487) in the following code determined?
CSCTL2 = FLLD_0 + 487; // DCOCLKDIV = 16MHz

Next, we referred to the following file.
---msp430fr267x_CS_05.c
The frequency is the same at 16MHz setting, but the Software_Trim function is executed.
The execution time of Software_Trim function is about 70ms.


・I do not want to execute the Software_Trim function, is this a problem?

best regards

  • 1) 487 = (16MHz/32kHz)-1

    2) You'll probably get differing opinions on Software_Trim [Ref User Guide (SLAU445I) Sec 3.2.11.2]. It deals with a somewhat arcane (potential) problem: Each DCORSEL/DCOFTRIM setting provides a range of frequencies achievable by varying DCO (FLL operation). For some DCOFTRIM and target clock settings, it is (theoretically) possible for the resulting DCO value to be so close to the edge of its range that it can't shift to account for temperature changes. I invariably use "nice round numbers" (integer MHz) for target speed, and when I did the arithmetic I concluded that with DCOFTRIM=3 (mid-range) the DCO range (2x [Ref data sheet (SLASE59F) Tables 5-6 and 5-5]) was plenty for my purposes. I (like you) also didn't want to pay the startup-time cost, so I don't use it. If I were trying to build a safety-critical application with an FR2 device I might.

    [Edit: Added note about safety-critical applications.]

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