I am planning to minimize power by keeping the device in LPM4 during a base level loop with the eCOMP interrupt enabled, and wake up the device when the voltage on P1.1 (configured as the V+ eCOMP input) exceeds a threshold set in the eCOMP 6-bit DAC, which is configured as the V- eCOMP input. I set up the eCOMP as shown below, and set up the SR for low power mode like this -- __bis_SR_register(LPM4_bits + GIE);.
// Configure eCOMP
static const int thresholdFlu8_9 = 20;
CPCTL0 = CPPSEL0 | CPNSEL1 | CPNSEL2 | CPPEN | CPNEN; // Select C1 as input for V+ terminal
// Select DAC as input for V- terminal
// Enable eCOMP input
CPDACCTL = CPDACREFS | CPDACEN | CPDACBUFS; // On-chip 1.5V Vref selected, DAC enabled
// CPDACBUFS=1 and CPDACSW=0 -- CPDACBUF1 selected as buffer control source
CPDACDATA = thresholdFlu8_9;
CPCTL1 = CPMSEL | CPHSEL_3 | CPIE | CPEN; // Low power eCOMP mode, rising edge interrupt enabled, eCOMP enabled in 30 mV hysteresis mode
Based on the eCOMP characteristics table in section 8.12.9.1 of SLASE78E, I expected that enabling the eCOMP like this would increase the current draw by 5uA or less while in the base level loop with no interrupt present, but my tests so far show a current draw increase of 100 uA when the eCOMP gets enabled. Is there something wrong with my configuration?
