MSP430FR50431: BSL/CCS

hi Zoey,

We are working on the BSL now. It is very difficult to debug because there is no access to it.

Let me update you on our progress. We've taken our first steps toward mass-erasing the flash.

1. Proprietary command is sent from the master to the TI (slave)
2. Code execution in the ISR to go to the BSL as follows:

            __disable_interrupt(); // Disable all interrupts

            ((void (*)())0x1000)(); // Jump to BSL start address

         3.  Master sends the BSL the following command as found in slau550ab.pdf page 19 as follows

You will note in the two following pictures a WRITE and a READ; however, we are getting, as you can see below, something else, and after resetting the TI, we are back in the code.

1. note on our current board we do not have the ability to hardware toggle RST and TEST to enter BSL mode.

a. Initiate_a_mass_erase

b. BSL_response

Thanks,

Ephraim

Hi Zoey

Kindly update.

Br

Ephraim

Hi,

Have you tried to use hardware invoke to enter into BSL instead of PC jumping?

Regards,

Zoey

hi Zoey,

we have tried both. are there timing issues we need to consider, between i2c write and i2c read? 

kindly help.

thanks,

Have you try to wait some time after mass erase? Due to it will need some time to finish it. 

Do you have a logic analyzer on your side? Like Saleae? To capture the I2C signals for us that will be easy to identify the issue.

Based on the wave form you shared about the mass erase it seems the slave has ACK the host that means you have go into BSL mode successfully.

hi Gary, 

kindly show byte by byte the packet, not including the I2C, needed for mass erase, and password. Shir will send you the analyser data.

kindly add shir@aquasmart.ai to this thread.

thanks,

Hi Ephraim,

It seems I can't notify shir@aquasmart.ai  in this thread, could you help to notify him/her to put information here?

Hi Gary

Kindly share your email so that Shir may contact you directly so we may resolve this critical issue.

Also kindly share your understanding with example of mass flash erase and password  packets.

Thanks

hey here Shir

Hi Gary,

does i need to Stop watchdog timer before erase_flash ? on MSP430FR50431

Thanks
Shir

After entering the BSL through the hardware.
I give the mass erase command and then I read one byte of response and get the value 0x51.
According to the table of errors in the document: ( 0x51 Header incorrect. The packet did not begin with the required value of 0x80)
 Attached are 2 pictures, one of the command to erase and the other of the reading of the answer.
You can see that the command contains the desired header ,
so I ask what could be the problem here?
Thanks

Yes, please stop it, for software invoke just to set the PC to the start address of the BSL, the peripheral's value will not be changed, so the watchdog can be working when go into BSL.

Have you try to wait some time after mass erase? 

yes ,
but it dose not change the response value , 
as you see the response = 0x51 for few minetes

How long should i wait
And what is the answer I should get in the meantime?

100ms should be enough.