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msp430fg4616 series cpu clock and timer configuration problem

rameshwar kakade
Prodigy 10 points

Hi! ti

I am new user for Using the Ti Msp430 processor and ccs3.0 and 5.0 studio, iam able to install and run the code successfully.

but problem is that, according to datasheet ,using verious types of combination  to conifgure MCLK  for reaching the frequency 0.65 to 70mhz, but in datasheet given support only 16mhz-25mhz.

by using different Tap 2-27 combination i am able to reach only 20mhz frequency .

so how to used tap configuration for increasing the  mcpu system frequency.

thanks

  • 0
    Guru 227245 points

    rameshwar kakade said:
    conifgure MCLK  for reaching the frequency 0.65 to 70mhz

    Well, maximum allowed frequency for MCLK is 8 to 25MHz (depending on the specific MSP you're using).
    DCO can generate frequencies above the allowed for several reasons. One of them is that generating a higher frequency and dividing it by two (or even 4) may better reach your desired target than trying to adjus tthe DCO for a factor of 1. Also, using a divider reduces the clock jitter that is introduced by the modulation stage. Remember, the DCO only have a limited number of frequency settings (8 to 32 DCOx taps and 34 to 8 RSEL ranges), and they also vary largely from device to device.

    There is no general setting that will result in a given frequency. This is why 2x family has calibraed (factory-tried) settings for some common frequencies, while the 4x and 5x families use a frequency-locked-loop (FLL) to adjust the DCO by comparing its output to a reference clock (e.g. a watch crystal)

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