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I've read different postings on the ability to output PWM on TA1.0 using TA1CCR0. Is it possible? And If so how do you set the PWM Period and duty cycle for TA1.0? Or is duty cycle a default for TA1.0 and cannot be changed? Specifically I'm using the MSP430F5528. Answers I have found didn't give me a clear answer.
Also are all TxX.0 timers the same way?
Thanks in advance. Christopher.
I would suggest reviewing the MSP430x5xx Family User's Guide on the MSP430F5528 Product Folder. Specifically, the Timer A chapter. Look at Section 17.2.3 which describes the Timer Mode Control.
You can technically support a PWM output on TA1.0 using TA1CCR0, BUT you will only be able to adjust the duty cycle and the frequency will be fixed. To use the TA1CCR0 compare circuit, the Timer will need to be operating in Continuous mode which forces the Timer to count from 00000h to 0FFFFh. Look specifically at Section 17.2.3.2.
Thanks. This is what I was thinking. And reading the Users Guide can sometimes be cryptic thats why I was asking around.
I'm trying to control a Servo with TA1.0 so if I can get the right combination for the SMCLK then I guess this will work. Else being able to TA1CCR0 for setting the PWM period is a very convient way of doing it for TA1.1 and TA1.2.
Christopher.
If you use plain hardware PWM, then you have three options:c_builder said:And If so how do you set the PWM Period and duty cycle for TA1.0? Or is duty cycle a default for TA1.0 and cannot be changed?
But there is another option: hardware-supporteds software PWM. Here too, teh timer runs in cont mode. But you let CCR0 trigger an interrupt in which you increment the value of CCR0 to the next trigger point.
If you e.g. set CCR0 to 10, then on next interrupt you add 90, then 10, then 90 etc. and let the hardware toggle the output on each compare event, then you'll get a PWM output with 100 timer ticks cycle time and 10% DC.
This mode is quite flexible, but is also somewhat limited: you must ensure that the ISR that increments the CCR0 register, is executed 8and performs the increment) before timer passes beyond the new trigger point. Or else you'll have an 'overlong' cycle of 65536 additional timer ticks.
This mode (without the output toggle) is also often used to generate different software time counters.
Yes. AFAIK there is no difference for TImerA.CCR0 or TimerB.CCR0. The only differences (whcih are device specific) are the assigned physical output pins and the internal or extenal signal sources for the capture interrupt.c_builder said:Also are all TxX.0 timers the same way?
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