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Can both UCBO and UCB1 operate SPI buses simultaneously?

Troy Johnson
Intellectual 555 points
Other Parts Discussed in Thread: MSP430F5529

I've written some code which runs on a MSP430F5529.  I have two SPI interfaces.  The first SPI bus connects to a micro SD Card on UCB1 and is setup where the MSP430 acts as the master.  The second SPI interface connects to a different CPU with UCB0.  This second SPI interface is setup with the MSP430 as the slave, with the other CPU clocking data out of the MSP430.  Both interfaces work flawlessly when I operate them alone.  However what I need to do is read data from the SD Card, buffer it in memory in the MSP430, then have the other CPU clock it out.

Like I said each interface works flawlessly by themselves, but when I combine the two together, I occasionally (not very often) see a couple bit errors in the same word.

I've created a file that has every 8-bit word equal to 0xFF.  I have 4 buffers, each 512 bytes long.  The external CPU only clocks data at 1000 bytes per second, so not very fast.  Once the MSP430 has filled all 4 buffers with data from the SD Card, I kick off a DMA pointed to the UCB0TX buffer.  This DMAs completes once the CPU has clocked the data out.  I then have an ISR which sets up the next DMA and triggers the next buffer to be loaded from disk.  I've put code in place to check for buffer over runs, and under runs and none of those happen.

If I just load my buffers once (so that they all have 0xFF) and let the DMA do its job, looping through the buffers, I see no errors.

However if UCB1 is actively operating, loading 0xFF into the buffers, then I see bit errors on the external CPU.  I've looked on the SPI bus itself and see bit errors there, but when I check the buffers inside the MSP430 every byte is equal to 0xFF as I expect.

So my question is, any idea where the bit errors are coming from?

Is there a flaw in my logic?

Can both UCBO and UCB1 operate at the same time?  I can see a case where it would be possible for the MSP430 to be transferring from the SD card at the same time the external CPU master decides to start clocking out data.  Will this cause problems?  From reading the data sheet, these are independent SPI buses and should be able to work independently (since one is a DMA it doesn't require CPU Cycles)

Any help would be appreciated!

Thanks

  • 0
    Guru 227245 points

    Troy Johnson said:
    Like I said each interface works flawlessly by themselves, but when I combine the two together, I occasionally (not very often) see a couple bit errors in the same word.

    This is strange.
    SPI is actively driven, so there shoul d be no crosstalk. Also, it is synchronous.
    Maybe you use the wrong polarity/phase setting fo rone of the SPI ocnnecitons. If both, polarity and phase, are wrong, this usually leads to a seemingly stable transfer, but the timing is very fragile. Additional crosstalk from other PCB traces may distort it enough to produce bit errors.

  • 0 in reply to Jens-Michael Gross
    Intellectual 555 points

    I'm glad you think this is strange.  That means my original assumptions hold true.  I'll dig in further.

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