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MSP430F247 Flash Information Memory Occupies SRAM Address Space

Kun Yang2
Prodigy 80 points

Other Parts Discussed in Thread: MSP430F247

Dear Folks,

1. I am currently using MSP430F247 in my project. According to the datasheet, SRAM starts at 0x0200 and ends at 0x11FF with 4KB space. However, there is a 512-byte Flash Information Memory with a address range from 0x01000 to 0x010FF. It seems that the Flash Information Memory overlaps a part of SRAM. Is it correct? I am a little confused whether the address space from 0x01000 to 0x010FF belongs to Flash or RAM. It seems that the real SRAM size is smaller than the specified 4KB. 

2. Is it true that the compiler will touch the SRAM and store some data in the SRAM even if my codes didn't explicitly ask the compiler to do that kind of job?  

Could somebody please explain these for me? Thanks a lot!

  • 0
    Guru 58965 points

    F247 has 4KB of RAM and can be accessed at addresses from 0x1100 to 0x20FF.

    The first 2KB of these 4KB (that is, those from 0x1100 to 0x18FF) can also be accessed at addresses from 0x0200 to 0x09FF. Addresses 0x0A00 to 0x0BFF are empty. 0x0C00 to 0x0FFF are for BSL ROM, and 0x1000 to 0x10FF are for Info Flash.

    Compiler usually allocate "RAM" to global variables, static variables, stack, etc. It is the Linker's job to assign addresses to "RAM" as directed by the link command file. I expect one would use 0x1100 to 0x20FF. But it could use 0x0200 to 0x09FF plus 0x1900 to 0x20FF; but that is very silly.

  • 0 in reply to old_cow_yellow
    Prodigy 80 points

    Thank you so much for your reply. It is very clear. Can you please tell me where I can find the information about the F247 address space (from 0x1100 to 0x20FF)? I cannot find it in the MSP430x2xx.pdf, which just mentions that RAM starts at 0200h and the end address of RAM depends on the amount of RAM present. 

  • 0 in reply to old_cow_yellow
    Prodigy 80 points

    Thank old_cow_yellow so much for sparing time to answer my naive question. I finally find the detailed information about F247 address space in MSP430F247.pdf other than MSP430x2xx.pdf. It is weird that TI does not provide download link for MSP430F247.pdf under the category of MSP430F247. I find it through Google. Anyway, it is really very encouraging to obtain your help when I touch the MCU programming as a newbie. 

  • 0 in reply to Kun Yang2
    Guru 227245 points

    Kun Yang2 said:
    I finally find the detailed information about F247 address space in MSP430F247.pdf other than MSP430x2xx.pdf. It is weird that TI does not provide download link for MSP430F247.pdf under the category of MSP430F247

    I'm sure they did.

    Possibly, the firs document you mentiont is the device specific datasheet (slas457i.pdf?), while the second is the family users guide (slau144j.pdf). The users guide contains generic information about all 2x family devices, whiel the datasheet is device specific. Both (and the device-specific errata sheet) are available right at the top of the product page.

  • 0 in reply to Jens-Michael Gross
    Prodigy 80 points

    Jens-Michael Gross said:

    I finally find the detailed information about F247 address space in MSP430F247.pdf other than MSP430x2xx.pdf. It is weird that TI does not provide download link for MSP430F247.pdf under the category of MSP430F247

    I'm sure they did.

    Possibly, the firs document you mentiont is the device specific datasheet (slas457i.pdf?), while the second is the family users guide (slau144j.pdf). The users guide contains generic information about all 2x family devices, whiel the datasheet is device specific. Both (and the device-specific errata sheet) are available right at the top of the product page.

    [/quote]

    You are right.

  • 0 in reply to Kun Yang2
    Guru 227245 points

    BTW: the reason for having this mirrored ram area is that there are some MSPs with just 2k ram, located at the same address, but with otherwise identical hardware features.

    So you can run a binary for one of these other MSPs on this chip without need to recompile. (direct replacement).

    New firmware will of course ignore the lower mirror and directly use the larger upper memory region, if compiled for the larger chip.

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