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Hello Luis,
Now I am trying to build and debug App1_MSPBoot (MSPBoot is already flashed to controller). I changed the cmd file for MSP430FR5969 accordingly (file attached for your reference). But when I start debugging.... application starts running immediately with Resume(F8) button disabled.... and when I suspend execution (Alt+F8) it says No source available for "0x4". Additionally the application is not doing what it is supposed to do (toggling P4.7 pin).
Regards,
Deep
/* ============================================================================ */ /* Copyright (c) 2014, Texas Instruments Incorporated */ /* All rights reserved. */ /* */ /* Redistribution and use in source and binary forms, with or without */ /* modification, are permitted provided that the following conditions */ /* are met: */ /* */ /* * Redistributions of source code must retain the above copyright */ /* notice, this list of conditions and the following disclaimer. */ /* */ /* * Redistributions in binary form must reproduce the above copyright */ /* notice, this list of conditions and the following disclaimer in the */ /* documentation and/or other materials provided with the distribution. */ /* */ /* * Neither the name of Texas Instruments Incorporated nor the names of */ /* its contributors may be used to endorse or promote products derived */ /* from this software without specific prior written permission. */ /* */ /* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ /* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ /* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ /* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ /* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ /* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ /* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ /* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ /* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ /* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ /* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* ============================================================================ */ /******************************************************************************/ /* lnk_msp430fr5969.cmd - LINKER COMMAND FILE FOR LINKING MSP430FR5969 PROGRAMS */ /* */ /* Usage: lnk430 <obj files...> -o <out file> -m <map file> lnk.cmd */ /* cl430 <src files...> -z -o <out file> -m <map file> lnk.cmd */ /* */ /*----------------------------------------------------------------------------*/ /****************************************************************************/ /* SPECIFY THE SYSTEM MEMORY MAP */ /****************************************************************************/ /* The following definitions can be changed to customize the memory map for a different device * or other adjustments * Note that the changes should match the definitions used in MEMORY and SECTIONS * */ /* RAM Memory Addresses */ __RAM_Start = 0x1C00; /* RAM Start */ __RAM_End = 0x1FFF; /* RAM End */ /* RAM shared between App and Bootloader, must be reserved */ PassWd = 0x1C00; /* Password sent by App to force boot mode */ StatCtrl = 0x1C02; /* Status and Control byte used by Comm */ CI_State_Machine = 0x1C03; /* State machine variable used by Comm */ CI_Callback_ptr = 0x1C04; /* Pointer to Comm callback structure */ /* Unreserved RAM used for Bootloader or App purposes */ _NonReserved_RAM_Start = 0x1C06; /* Non-reserved RAM */ /* Flash memory addresses */ /* Download area: C200-DDFF*/ /* App area : DE00-F9FF*/ /* Boot area : FA00-FFFF*/ _FLASHDOWN_START = 0xC200; /* Start if download area */ __Flash_Start = 0xDE00; /* Start of Flash */ __Flash_End = 0xFFFF; /* End of Flash */ /* Reserved Flash locations for Bootloader Area */ __Boot_Start = 0xFA00; /* Boot flash */ __Boot_Reset = 0xFFFE; /* Boot reset vector */ __Boot_VectorTable = 0xFF90; /* Boot vector table */ __Boot_SharedCallbacks_Len = 8; /* Length of shared callbacks (2 calls =4B(msp430) or 8B(msp430x) */ __Boot_SharedCallbacks = 0xFF88; /* Start of Shared callbacks */ _BOOT_APPVECTOR = __Boot_SharedCallbacks; /* Definition for application table */ /* Reserved Flash locations for Application Area */ _AppChecksum = (__Flash_Start); /* CRC16 of Application */ _AppChecksum_8 = (__Flash_Start+2); /* CRC8 of Application */ _App_Start = (__Flash_Start+3); /* Application Area */ _App_End = (__Boot_Start-1); /* End of application area (before boot) */ _CRC_Size = (_App_End - _App_Start +1); /* Number of bytes calculated for CRC */ _App_Reset_Vector = (__Boot_Start-2); /* Address of Application reset vector */ _App_Proxy_Vector_Start = 0xF990; /* Proxy interrupt table */ /* MEMORY definition, adjust based on definitions above */ MEMORY { SFR : origin = 0x0000, length = 0x0010 PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 // RAM from _NonReserved_RAM_Start - __RAM_End RAM : origin = 0x1C06, length = 0x3FA INFOBOOT : origin = 0x1800, length = 0x100 // Flash from _App_Start -> (APP_PROXY_VECTORS-1) FLASH : origin = 0xDE03, length = 0x1B8D // Interrupt Proxy table from _App_Proxy_Vector_Start->(RESET-1) INT00 : origin = 0xF990, length = 0x0002 INT01 : origin = 0xF992, length = 0x0002 INT02 : origin = 0xF994, length = 0x0002 INT03 : origin = 0xF996, length = 0x0002 INT04 : origin = 0xF998, length = 0x0002 INT05 : origin = 0xF99A, length = 0x0002 INT06 : origin = 0xF99C, length = 0x0002 INT07 : origin = 0xF99E, length = 0x0002 INT08 : origin = 0xF9A0, length = 0x0002 INT09 : origin = 0xF9A2, length = 0x0002 INT10 : origin = 0xF9A4, length = 0x0002 INT11 : origin = 0xF9A6, length = 0x0002 INT12 : origin = 0xF9A8, length = 0x0002 INT13 : origin = 0xF9AA, length = 0x0002 INT14 : origin = 0xF9AC, length = 0x0002 INT15 : origin = 0xF9AE, length = 0x0002 INT16 : origin = 0xF9B0, length = 0x0002 INT17 : origin = 0xF9B2, length = 0x0002 INT18 : origin = 0xF9B4, length = 0x0002 INT19 : origin = 0xF9B6, length = 0x0002 INT20 : origin = 0xF9B8, length = 0x0002 INT21 : origin = 0xF9BA, length = 0x0002 INT22 : origin = 0xF9BC, length = 0x0002 INT23 : origin = 0xF9BE, length = 0x0002 INT24 : origin = 0xF9C0, length = 0x0002 INT25 : origin = 0xF9C2, length = 0x0002 INT26 : origin = 0xF9C4, length = 0x0002 INT27 : origin = 0xF9C6, length = 0x0002 INT28 : origin = 0xF9C8, length = 0x0002 INT29 : origin = 0xF9CA, length = 0x0002 INT30 : origin = 0xF9CC, length = 0x0002 INT31 : origin = 0xF9CE, length = 0x0002 INT32 : origin = 0xF9D0, length = 0x0002 INT33 : origin = 0xF9D2, length = 0x0002 INT34 : origin = 0xF9D4, length = 0x0002 INT35 : origin = 0xF9D6, length = 0x0002 INT36 : origin = 0xF9D8, length = 0x0002 INT37 : origin = 0xF9DA, length = 0x0002 INT38 : origin = 0xF9DC, length = 0x0002 INT39 : origin = 0xF9DE, length = 0x0002 INT40 : origin = 0xF9E0, length = 0x0002 INT41 : origin = 0xF9E2, length = 0x0002 INT42 : origin = 0xF9E4, length = 0x0002 INT43 : origin = 0xF9E6, length = 0x0002 INT44 : origin = 0xF9E8, length = 0x0002 INT45 : origin = 0xF9EA, length = 0x0002 INT46 : origin = 0xF9EC, length = 0x0002 INT47 : origin = 0xF9EE, length = 0x0002 INT48 : origin = 0xF9F0, length = 0x0002 INT49 : origin = 0xF9F2, length = 0x0002 INT50 : origin = 0xF9F4, length = 0x0002 INT51 : origin = 0xF9F6, length = 0x0002 INT52 : origin = 0xF9F8, length = 0x0002 INT53 : origin = 0xF9FA, length = 0x0002 INT54 : origin = 0xF9FC, length = 0x0002 // App reset from _App_Reset_Vector RESET : origin = 0xF9FE, length = 0x0002 } /****************************************************************************/ /* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ /****************************************************************************/ SECTIONS { .bss : {} > RAM /* GLOBAL & STATIC VARS */ .data : {} > RAM /* GLOBAL & STATIC VARS */ .sysmem : {} > RAM /* DYNAMIC MEMORY ALLOCATION AREA */ .stack : {} > RAM (HIGH) /* SOFTWARE SYSTEM STACK */ .text : {} >> FLASH |INFOBOOT /* CODE */ .cinit : {} > FLASH |INFOBOOT /* INITIALIZATION TABLES*/ .const : {} >> FLASH |INFOBOOT /* CONSTANT DATA */ .cio : {} > RAM /* C I/O BUFFER */ /* MSP430 INTERRUPT VECTORS */ .int00 : {} > INT00 .int01 : {} > INT01 .int02 : {} > INT02 .int03 : {} > INT03 .int04 : {} > INT04 .int05 : {} > INT05 .int06 : {} > INT06 .int07 : {} > INT07 .int08 : {} > INT08 .int09 : {} > INT09 .int10 : {} > INT10 .int11 : {} > INT11 .int12 : {} > INT12 .int13 : {} > INT13 .int14 : {} > INT14 .int15 : {} > INT15 .int16 : {} > INT16 .int17 : {} > INT17 .int18 : {} > INT18 .int19 : {} > INT19 .int20 : {} > INT20 .int21 : {} > INT21 .int22 : {} > INT22 .int23 : {} > INT23 .int24 : {} > INT24 .int25 : {} > INT25 .int26 : {} > INT26 .int27 : {} > INT27 .int28 : {} > INT28 .int29 : {} > INT29 AES256 : { * ( .int30 ) } > INT30 type = VECT_INIT RTC : { * ( .int31 ) } > INT31 type = VECT_INIT PORT4 : { * ( .int32 ) } > INT32 type = VECT_INIT PORT3 : { * ( .int33 ) } > INT33 type = VECT_INIT TIMER3_A1 : { * ( .int34 ) } > INT34 type = VECT_INIT TIMER3_A0 : { * ( .int35 ) } > INT35 type = VECT_INIT PORT2 : { * ( .int36 ) } > INT36 type = VECT_INIT TIMER2_A1 : { * ( .int37 ) } > INT37 type = VECT_INIT TIMER2_A0 : { * ( .int38 ) } > INT38 type = VECT_INIT PORT1 : { * ( .int39 ) } > INT39 type = VECT_INIT TIMER1_A1 : { * ( .int40 ) } > INT40 type = VECT_INIT TIMER1_A0 : { * ( .int41 ) } > INT41 type = VECT_INIT DMA : { * ( .int42 ) } > INT42 type = VECT_INIT USCI_A1 : { * ( .int43 ) } > INT43 type = VECT_INIT TIMER0_A1 : { * ( .int44 ) } > INT44 type = VECT_INIT TIMER0_A0 : { * ( .int45 ) } > INT45 type = VECT_INIT ADC12 : { * ( .int46 ) } > INT46 type = VECT_INIT USCI_B0 : { * ( .int47 ) } > INT47 type = VECT_INIT USCI_A0 : { * ( .int48 ) } > INT48 type = VECT_INIT WDT : { * ( .int49 ) } > INT49 type = VECT_INIT TIMER0_B1 : { * ( .int50 ) } > INT50 type = VECT_INIT TIMER0_B0 : { * ( .int51 ) } > INT51 type = VECT_INIT COMP_E : { * ( .int52 ) } > INT52 type = VECT_INIT UNMI : { * ( .int53 ) } > INT53 type = VECT_INIT SYSNMI : { * ( .int54 ) } > INT54 type = VECT_INIT .reset : {} > RESET /* MSP430 RESET VECTOR */ } /****************************************************************************/ /* INCLUDE PERIPHERALS MEMORY MAP */ /****************************************************************************/ -l msp430fr5969.cmd
Hi Luis,
Thanks for your response. Answers to your points:
1. I checked the reset vector it points to _c_int00
2. yes it starts executing at _c_int00
3. it is stuck in the loop waiting for the packets.
Additionally I tried to create the C array (size 7KB) of the APP1 and tried to flash it using TI_MSPBoot_MI_WriteByteDirect() in the main(). With this I could not build the project and was getting error #10099-D: program will not fit into available, I suppose it was because of its size (7KB). Can you please suggest if there is some other way to do it? Attaching array.c file.
Regards,
Deep
// // Filename: AppForHost.c // Generated from msp430fr59xx_1_CRC.txt // Mon Jun 8 11:06:20 2015 #include <stdint.h> #define App1Array_SIZE 7168 const uint16_t App1Array_Addr[1] = { 0xde00, // Address segment0 }; const uint16_t App1Array_Size[1] = { 7168, // Size segment0 }; const uint8_t App1Array_0[] = { 0x86,0xc4,0xff,0xff,0x2a,0x14,0x40,0x18,0x1a,0x42,0x5c,0x01,0x8f,0x00,0x00,0x00, 0x9f,0x00,0x00,0x00,0x13,0x24,0x89,0x00,0x00,0x00,0x88,0x00,0x00,0x00,0x0c,0x3c, 0x0c,0x09,0x7f,0x4c,0x5f,0x06,0x00,0x18,0x5f,0x4f,0x00,0x00,0xa9,0x00,0x04,0x00, 0x0d,0x09,0x4f,0x13,0xa9,0x00,0x04,0x00,0xd9,0x08,0xf2,0x23,0x7a,0xc2,0x3a,0xd0, 0x08,0x5a,0x40,0x18,0x82,0x4a,0x5c,0x01,0x8f,0x00,0x00,0x00,0x9f,0x00,0x00,0x00, 0x09,0x24,0x8a,0x00,0x00,0x00,0x03,0x3c,0x6a,0x13,0xaa,0x00,0x04,0x00,0x9a,0x00, 0x00,0x00,0xfa,0x23,0x28,0x16,0x10,0x01,0xb2,0x40,0x80,0x5a,0x5c,0x01,0xd2,0xc3, 0x02,0x02,0xd2,0xd3,0x04,0x02,0x92,0xc3,0x30,0x01,0xd2,0xe3,0x02,0x02,0x0d,0x14, 0x3d,0x40,0x32,0x82,0x1d,0x83,0xfe,0x23,0x0d,0x16,0xf7,0x3f,0x03,0x43,0x81,0x00, 0x00,0x20,0xb0,0x13,0xae,0xde,0x0c,0x93,0x02,0x24,0xb0,0x13,0x04,0xde,0x0c,0x43, 0xb0,0x13,0x68,0xde,0xb0,0x13,0xb2,0xde,0x32,0xd0,0x10,0x00,0xfd,0x3f,0x1c,0x43, 0x10,0x01,0x03,0x43,0xff,0x3f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, 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0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xa8,0xde,0xa8,0xde, 0xa8,0xde,0xa8,0xde,0xa8,0xde,0xa8,0xde,0xa8,0xde,0xa8,0xde,0xa8,0xde,0xa8,0xde, 0xa8,0xde,0xa8,0xde,0xa8,0xde,0xa8,0xde,0xa8,0xde,0xa8,0xde,0xa8,0xde,0xa8,0xde, 0xa8,0xde,0xa8,0xde,0xa8,0xde,0xa8,0xde,0xa8,0xde,0xa8,0xde,0xa8,0xde,0x8e,0xde, }; const uint8_t *App1Array_Ptr[1] = { App1Array_0, };
Have you tried single-stepping in assembly to check where it fails? If you have, when does it fail?
Are you configuring the flash timing before calling the function? The FCTL2 register is configured in the EraseSector function
Regards,
Luis R
Hi Luis,
It worked, thanks for your support!! It was stuck at CRC checking.
As mentioned in the last post that I had created the C array (size 7KB) of the APP1 and was getting error #10099-D: program will not fit into available. To overcome this issue I have just used 2 small arrays App1Array_0[181] and App1Array_1[51] and could finally run the code (main file is attached for your reference).
1. One issue here is when I run the project thru debugger it runs with no problem. But with power-on the it behaves differently, the application is reset as soon as it jumps to the application (main file and command file is attached for your reference).
2. Additionally I want to know, how I can use the existing BSL to upgrade the firmware via simple UART cable through PC. Is there any such tool available?
Regards,
Deep
/* * \file main.c * * \brief Main routine for the bootloader for FR5739 * */ /* --COPYRIGHT--,BSD * Copyright (c) 2012, Texas Instruments Incorporated * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * * Neither the name of Texas Instruments Incorporated nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * --/COPYRIGHT--*/ // // Include files // #include "msp430.h" #include "TI_MSPBoot_Common.h" #include "TI_MSPBoot_CI.h" #include "TI_MSPBoot_MI.h" #include "TI_MSPBoot_AppMgr.h" //////////////////////////////////////////////////////////////////////////////////// ///////////////////Deep TEST//////////////////// #include <stdint.h> #define App1Array_SIZE 7168 //const uint16_t App1Array_Addr[1] = { // 0xde00, // Address segment0 //}; // //const uint16_t App1Array_Size[1] = { //7168, // Size segment0 //}; uint8_t App1Array_0[] = { 0x86,0xc4,0xff,0xff,0x2a,0x14,0x40,0x18,0x1a,0x42,0x5c,0x01,0x8f,0x00,0x00,0x00, 0x9f,0x00,0x00,0x00,0x13,0x24,0x89,0x00,0x00,0x00,0x88,0x00,0x00,0x00,0x0c,0x3c, 0x0c,0x09,0x7f,0x4c,0x5f,0x06,0x00,0x18,0x5f,0x4f,0x00,0x00,0xa9,0x00,0x04,0x00, 0x0d,0x09,0x4f,0x13,0xa9,0x00,0x04,0x00,0xd9,0x08,0xf2,0x23,0x7a,0xc2,0x3a,0xd0, 0x08,0x5a,0x40,0x18,0x82,0x4a,0x5c,0x01,0x8f,0x00,0x00,0x00,0x9f,0x00,0x00,0x00, 0x09,0x24,0x8a,0x00,0x00,0x00,0x03,0x3c,0x6a,0x13,0xaa,0x00,0x04,0x00,0x9a,0x00, 0x00,0x00,0xfa,0x23,0x28,0x16,0x10,0x01,0xb2,0x40,0x80,0x5a,0x5c,0x01,0xd2,0xc3, 0x02,0x02,0xd2,0xd3,0x04,0x02,0x92,0xc3,0x30,0x01,0xd2,0xe3,0x02,0x02,0x0d,0x14, 0x3d,0x40,0x32,0x82,0x1d,0x83,0xfe,0x23,0x0d,0x16,0xf7,0x3f,0x03,0x43,0x81,0x00, 0x00,0x20,0xb0,0x13,0xae,0xde,0x0c,0x93,0x02,0x24,0xb0,0x13,0x04,0xde,0x0c,0x43, 0xb0,0x13,0x68,0xde,0xb0,0x13,0xb2,0xde,0x32,0xd0,0x10,0x00,0xfd,0x3f,0x1c,0x43, 0x10,0x01,0x03,0x43,0xff,0x3f }; uint8_t App1Array_1[] = { 0xa8,0xde,0xa8,0xde, 0xa8,0xde,0xa8,0xde,0xa8,0xde,0xa8,0xde,0xa8,0xde,0xa8,0xde,0xa8,0xde,0xa8,0xde, 0xa8,0xde,0xa8,0xde,0xa8,0xde,0xa8,0xde,0xa8,0xde,0xa8,0xde,0xa8,0xde,0xa8,0xde, 0xa8,0xde,0xa8,0xde,0xa8,0xde,0xa8,0xde,0xa8,0xde,0xa8,0xde,0xa8,0xde,0x8e,0xde }; //const uint8_t *App1Array_Ptr[1] = { //App1Array_0, //}; uint8_t i=0; uint16_t addr1 = 0xde00; ///////////////////Deep TEST END//////////////// //////////////////////////////////////////////////////////////////////////////////// // // Local function prototypes // static void clock_init(void); static void HW_init(void); static void MPU_init(void); static uint8_t TI_MSPBoot_MI_WriteByteDirect_Main(uint16_t addr, uint8_t data); static void TI_MSPBoot_MI_EraseAppDirect_Main(uint8_t DownArea); /****************************************************************************** * * @brief Main function * - Initializes the MCU * - Selects whether to run application or bootloader * - If bootloader: * - Initializes the peripheral interface * - Waits for a command * - Sends the corresponding response * - If application: * - Jump to application * * @note USI interrupts are enabled after this function * @return none *****************************************************************************/ int main_boot( void ) { // Stop watchdog timer to prevent time out reset WDTCTL = WDTPW + WDTHOLD; // Configure GPIO P1OUT &= ~0x01; // Clear P1.0 output latch for a defined power-on state P1DIR |= 0x01; // Set P1.0 to output direction P4OUT &= ~0x80; // Clear P1.0 output latch for a defined power-on state P4DIR |= 0x80; // Set P1.0 to output direction PM5CTL0 &= ~LOCKLPM5; // Disable the GPIO power-on default high-impedance mode // Initialize MPU MPU_init(); // Initialize MCU HW_init(); clock_init(); P1OUT ^= BIT0; // Toggle LED __delay_cycles(500000); P1OUT ^= BIT0; __delay_cycles(500000); //TI_MSPBoot_MI_EraseAppDirect_Main(0); addr1 = 0xde00; for(i=0;i<=182;i++) { TI_MSPBoot_MI_WriteByteDirect_Main(addr1++, App1Array_0[i]); } addr1 = 0xf9cc; for(i=0;i<52;i++) { TI_MSPBoot_MI_WriteByteDirect_Main(addr1++, App1Array_1[i]); } P4OUT ^= BIT7; __delay_cycles(500000); // Validate the application and jump if needed //if (TI_MSPBoot_AppMgr_ValidateApp() == TRUE_t) TI_MSPBoot_APPMGR_JUMPTOAPP(); P4OUT ^= BIT7; TI_MSPBoot_CI_Init(); // Initialize the Communication Interface #ifndef NDEBUG PJDIR |= BIT0|BIT1; // Used for debugging purposes to show entry to MSPBoot PJOUT |= BIT0|BIT1; #endif while(1) { // MPUCTL0 = MPUPW | MPUENA; // Enable access to MPU registers // MPUSAM |= MPUSEG3WE; // Enable Write access // // *(uint8_t*)(0xde00)= App1Array_0[0]; // // MPUSAM &= ~MPUSEG3WE; // Disable Write access // MPUCTL0_H = 0x00; // Disable access to MPU registers // Poll PHY and Data Link interface for new packets TI_MSPBoot_CI_PHYDL_Poll(); // If a new packet is detected, process it if (TI_MSPBoot_CI_Process() == RET_JUMP_TO_APP) { // If Packet indicates a jump to App TI_MSPBoot_AppMgr_JumpToApp(); } #ifdef NDEBUG // Feed the dog every ~1000ms WATCHDOG_FEED(); #endif } } /****************************************************************************** * * @brief Initializes the MSP430 Clock * * @return none *****************************************************************************/ //inline static void clock_init(void) static void clock_init(void) { CSCTL0_H = 0xA5; CSCTL1 = DCOFSEL0 + DCOFSEL1; // Set DCO = 8Mhz CSCTL2 = SELA__VLOCLK + SELM__DCOCLK + SELS__DCOCLK; // set ACLK = VLO // MCLK=SMCLK=DCO #if (MCLK==1000000) CSCTL3 = DIVA__1 + DIVS__8 + DIVM__8; // Divide DCO/8 #elif (MCLK==4000000) CSCTL3 = DIVA__1 + DIVS__2 + DIVM__2; // Divide DCO/2 #elif (MCLK==8000000) CSCTL3 = DIVA__1 + DIVS__1 + DIVM__1; // Divide DCO/1 #else #error "Please define a valid MCLK or add configuration" #endif } /****************************************************************************** * * @brief Initializes the basic MCU HW * * @return none *****************************************************************************/ static void HW_init(void) { // Just initialize S2 button to force BSL mode P4OUT |= BIT1; P4REN |= BIT1; } /****************************************************************************** * * @brief Initializes the Memory Protection Unit of FR5739 * This allows for HW protection of Bootloader area * * @return none *****************************************************************************/ static void MPU_init(void) { // These calculations work for FR5739 (check user guide for MPUSEG values) #define MPUB1 (((APP_START_ADDR)&0x3F00)>>9) #define MPUB2 (((APP_END_ADDR+1)&0x3F00)>>9) // Enable access to MPU registers MPUCTL0 = MPUPW; // Seg1 = 0x0000 - App , Seg2 = App - Boot, Seg3 = Boot - 0xFFFF //MPUSEG = (MPUB2 << 8) | MPUB1; MPUSEGB1 = MPUB1; MPUSEGB2 = MPUB2; // Seg 3 doesn't have write-access and generates a PUC MPUSAM = 0x7D77; // Enable MPU MPUCTL0 = MPUPW |MPUENA; // Disable access to MPU Registers MPUCTL0_H = 0x00; } /****************************************************************************** * * @brief Write a Byte Directly to Flash memory * The bootloader is protected using MPU but all interrupts (except for * Vector) can be reprogrammed * * @param addr Address of the Byte being written in Flash * @param data Byte being written * * @return RET_OK when sucessful, * RET_PARAM_ERROR if address is outside of Application area *****************************************************************************/ uint8_t TI_MSPBoot_MI_WriteByteDirect_Main(uint16_t addr, uint8_t data) { //*(uint8_t *) addr = data; //if ((addr >= APP_VECTOR_TABLE) && (addr < APP_RESET_VECTOR_ADDR)) { // If address is an interrupt vector, copy directly to interrupt table // addr = (addr - APP_VECTOR_TABLE) + BOOT_VECTOR_TABLE; MPUCTL0 = MPUPW | MPUENA; // Enable access to MPU registers MPUSAM |= MPUSEG3WE; // Enable Write access *(uint8_t *) addr = data; // Write the vector MPUSAM &= ~MPUSEG3WE; // Disable Write access MPUCTL0_H = 0x00; // Disable access to MPU registers } return RET_OK; } void TI_MSPBoot_MI_EraseAppDirect_Main(uint8_t DownArea) { uint16_t addr; uint16_t Start, End; extern uint16_t _FLASHDOWN_START; // Define Address of Download area extern uint16_t _App_EndDown; // Define Address of Download area if (DownArea==0) { Start = APP_START_ADDR; End = APP_END_ADDR; } else { Start = ((uint16_t )&_FLASHDOWN_START); End = ((uint16_t )&_App_EndDown); } for (addr = End; addr >=Start; addr--) { MPUCTL0 = MPUPW | MPUENA; // Enable access to MPU registers MPUSAM |= MPUSEG3WE; // Enable Write access *(uint8_t *) (addr) = 0xFF; MPUSAM &= ~MPUSEG3WE; // Disable Write access MPUCTL0_H = 0x00; // Disable access to MPU registers } }
/******************************************************************************/ /* LINKER COMMAND FILE FOR MSPBoot BOOTLOADER USING MSP430FR5969 */ /* File generated with MSPBootLinkerGen.pl on 04-24-2015 */ /*----------------------------------------------------------------------------*/ /****************************************************************************/ /* SPECIFY THE SYSTEM MEMORY MAP */ /****************************************************************************/ /* The following definitions can be changed to customize the memory map for a different device * or other adjustments * Note that the changes should match the definitions used in MEMORY and SECTIONS * */ /* RAM Memory Addresses */ __RAM_Start = 0x1C00; /* RAM Start */ __RAM_End = 0x1FFF; /* RAM End */ /* RAM shared between App and Bootloader, must be reserved */ PassWd = 0x1C00; /* Password sent by App to force boot mode */ StatCtrl = 0x1C02; /* Status and Control byte used by Comm */ CI_State_Machine = 0x1C03; /* State machine variable used by Comm */ CI_Callback_ptr = 0x1C04; /* Pointer to Comm callback structure */ /* Unreserved RAM used for Bootloader or App purposes */ _NonReserved_RAM_Start = 0x1C06; /* Non-reserved RAM */ /* Flash memory addresses */ /* Download area: C200-DDFF*/ /* App area : DE00-F9FF*/ /* Boot area : FA00-FFFF*/ _FLASHDOWN_START = 0xC200; /* Start if download area */ __Flash_Start = 0xDE00; /* Start of Flash */ __Flash_End = 0xFFFF; /* End of Flash */ /* Reserved Flash locations for Bootloader Area */ __Boot_Start = 0xFA00; /* Boot flash */ __Boot_Reset = 0xFFFE; /* Boot reset vector */ __Boot_VectorTable = 0xFF90; /* Boot vector table */ __Boot_SharedCallbacks_Len = 8; /* Length of shared callbacks (2 calls =4B(msp430) or 8B(msp430x) */ __Boot_SharedCallbacks = 0xFF88; /* Start of Shared callbacks */ /* Reserved Flash locations for Application Area */ _AppChecksum = (__Flash_Start); /* CRC16 of Application */ _AppChecksum_8 = (__Flash_Start+2); /* CRC8 of Application */ _App_Start = (__Flash_Start+3); /* Application Area */ _App_End = (__Boot_Start-1); /* End of application area (before boot) */ _CRC_Size = (_App_End - _App_Start +1); /* Number of bytes calculated for CRC */ _App_Reset_Vector = (__Boot_Start-2); /* Address of Application reset vector */ _App_Proxy_Vector_Start = 0xF990; /* Proxy interrupt table */ // Addresses for Dual Image support in download ares _AppChecksumDown = (_FLASHDOWN_START); _AppChecksumDown_8 = (_FLASHDOWN_START+2); _App_StartDown = (_FLASHDOWN_START+3); _App_EndDown = (__Flash_Start-1); /* MEMORY definition, adjust based on definitions above */ MEMORY { SFR : origin = 0x0000, length = 0x0010 PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 // RAM from _NonReserved_RAM_Start - __RAM_End RAM : origin = 0x1C06, length = 0x3FA INFOBOOT : origin = 0x1800, length = 0x100 // Flash from __Boot_Start -( __Boot_SharedCallbacks or INT_VECTOR_TABLE) FLASH : origin = 0xFA00, length = 0x588 // Shared callbacks from __Boot_SharedCallbacks + Len (when used) BOOT_SHARED_CALLBACKS : origin = 0xFF88, length = 8 // Boot vector Table from __Boot_VectorTable- __Boot_Reset INT_VECTOR_TABLE : origin = 0xFF90, length = 0x6E // Boot reset from __Boot_Reset-__Flash_End RESET : origin = 0xFFFE, length = 0x0002 } /****************************************************************************/ /* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ /****************************************************************************/ SECTIONS { .bss : {} > RAM /* GLOBAL & STATIC VARS */ .data : {} > RAM /* GLOBAL & STATIC VARS */ .sysmem : {} > RAM /* DYNAMIC MEMORY ALLOCATION AREA */ .stack : {} > RAM (HIGH) /* SOFTWARE SYSTEM STACK */ .text : {} >> FLASH |INFOBOOT /* CODE */ .cinit : {} >> FLASH |INFOBOOT /* INITIALIZATION TABLES*/ .const : {} >> FLASH |INFOBOOT /* CONSTANT DATA */ .cio : {} > RAM /* C I/O BUFFER */ .BOOT_APP_VECTORS : {} > BOOT_SHARED_CALLBACKS /* MSP430 INTERRUPT VECTORS */ .BOOT_VECTOR_TABLE : {} > INT_VECTOR_TABLE .reset : {} > RESET /* MSP430 RESET VECTOR */ } /****************************************************************************/ /* INCLUDE PERIPHERALS MEMORY MAP */ /****************************************************************************/ -l MSP430FR5969.cmd
Hi Deep,
Deep Anand said:1. One issue here is when I run the project thru debugger it runs with no problem. But with power-on the it behaves differently, the application is reset as soon as it jumps to the application (main file and command file is attached for your reference).
Do you see this problem at the end of the download, or at the beginning of the bootloader execution when it decides to jump to application?
Try connecting to the device with "Debug without Downloading". Then go to the reset vector and start single-stepping. Is the application reset vector in the correct location?
Deep Anand said:2. Additionally I want to know, how I can use the existing BSL to upgrade the firmware via simple UART cable through PC. Is there any such tool available?
The code includes Host examples using MSP-EXP430G2 and MSP-EXP430F5438, but they work standalone and not through UART with the PC. In theory, a low-cost tool like the MSP-EXP430G2 or MSPBSL (http://www.ti.com/tool/MSPBSL
Hello Luis,
According to your last reply I tried debugging without download and found different behavior. I see this problem at the beginning of the bootloader execution when it decides to jump to application. I have created a document with snapshots explaining the problem.
The document shows the difference isDebugWithoutDownload.docx in between step 3 of ‘Debug with load symbols only’ and step 3 of ‘Debug with load program’. In ‘Debug with load symbols only’ (debug without download) the jump to Application is not happening. As in ‘Debug with load program’ (debug with download) the jump to Application is correct.
I have attached the document as well as the code for your reference.
Regards,
Deep
Hi Luis,
Now that I am writing MSPBOOT according to MSP430FR5969. I need your expert suggestions before starting it.
1. My requirement is to have two partitions of 24KB for dual Applications. The memory map What I decided if as:
/* Flash memory addresses */
/* Download area: 4400-C3FF*/
/* App area : C400-139FF*/
/* Boot area : 13A00-13FFF*/
is that the correct decision according to you?
2. Additionally I doubt that generated cmd files too if they are correct from the script as INT_VECTOR_TABLE length is mentioned as 0xFFFFC06E in Boot cmd file (INT_VECTOR_TABLE : origin = 0x13F90, length = 0xFFFFC06E)?? I am attaching both Boot and App cmd files for your reference.
3. Very important question, what are the changes I need to do in MSPBOOT to make it work for 64KB of memory??
Thanks & Regards,
Deep Anand
Hi Luis,
First of all thanks for your reply!!
Even I thought of the same way as your suggestion but wouldn't there be a problem if suppose later on the size of my application changes (Main: code memory::013FFFh-004400h)?? Additionally I will not get the continuous memory for one of the application......
So, instead I am thinking to implement the memory map as below:
/* Flash memory addresses *
/* Download area: A3A0-FB9F*/
/* App area : 4BA0-A39F*/
/* Boot area : 4400-4BFF*/
In this case even if the size of my application increases, only the Download area will only enter 20 bit address. The only thing I need to take care is to protect the RESET vector. Is my memory map above correct according to you or do you foresee any issues with this memory map??
One more thing I wanted t know, how MSPBoot and Application firmware can be flashed in the controller for the first time (e.g. while in manufacturing for mass production)?
Regards,
Deep
Hi Luis,
Thanks for your response regarding upgrade tools!!
I still need your expert comments on my memory map, described in my previous post, please reply:
/* Flash memory addresses *
/* Download area: A3A0-FB9F*/
/* App area : 4BA0-A39F*/
/* Boot area : 4400-4BFF*/
Regards,
Deep
Hi Luis,
Thanks for your comments!!
Further I moved one step ahead and tried to use a timer interrupt in the application (main file attached). The issue I am facing is.... when I configure the timer interrupt and enable the interrupts using '_enable_interrupts();' my application is resetting continuously. Timer ISR is never hit but the application is reset. The cmd files for both MSPBoot and Application are the default cmd files '5KB_Dual_Boot'. Could you please let me know what is going wrong?
When I tried to debug the assembly it says no code available for 0xfb1c (Print screen attached) and this 0xfb1c is actually '_c_int00' of the bootlader (MSPBoot) (Print screen attached).
I have also attached the application.
Regards,
Deep
/* --COPYRIGHT--,BSD_EX * Copyright (c) 2012, Texas Instruments Incorporated * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * * Neither the name of Texas Instruments Incorporated nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * ******************************************************************************* * * MSP430 CODE EXAMPLE DISCLAIMER * * MSP430 code examples are self-contained low-level programs that typically * demonstrate a single peripheral function or device feature in a highly * concise manner. For this the code may rely on the device's power-on default * register values and settings such as the clock configuration and care must * be taken when combining code from several examples to avoid potential side * effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware * for an API functional library-approach to peripheral configuration. * * --/COPYRIGHT--*/ //****************************************************************************** // MSP430FR59x Demo - Toggle P1.0 using software // // Description: Toggle P1.0 using software. // ACLK = n/a, MCLK = SMCLK = default DCO // // MSP430FR5969 // --------------- // /|\| | // | | | // --|RST | // | | // | P1.0|-->LED // // T. Witt/ P. Thanigai // Texas Instruments Inc. // July 2013 // Built with IAR Embedded Workbench V5.30 & Code Composer Studio V5.5 //****************************************************************************** #include <msp430.h> int main(void) { WDTCTL = WDTPW | WDTHOLD; // Stop WDT // // Configure GPIO P1OUT &= ~0x01; // Clear P1.0 output latch for a defined power-on state P1DIR |= 0x01; // Set P1.0 to output direction P4OUT &= ~0x80; // Clear P1.0 output latch for a defined power-on state P4DIR |= 0x80; // Set P1.0 to output direction PM5CTL0 &= ~LOCKLPM5; // Disable the GPIO power-on default high-impedance mode // to activate previously configured port settings TA0CCTL0 = CCIE; // TACCR0 interrupt enabled TA0CCR0 = 50000; TA0CTL = TASSEL__SMCLK | MC__UP; // SMCLK, UP mode //_enable_interrupts(); while(1) { __no_operation(); } } // Timer0_A3 interrupt service routine #pragma vector = TIMER0_A0_VECTOR __interrupt void Timer0_A0_ISR (void) { P1OUT ^= BIT0; }
Yes I have enabled ISR for TA0 vector 0xFFEA. By writing below lines:
TA0CCTL0 = CCIE; // TACCR0 interrupt enabled
TA0CCR0 = 50000;
TA0CTL = TASSEL__SMCLK | MC__UP; // SMCLK, UP mode
and for ISR I have used TIMER0_A0_VECTOR (#pragma vector = TIMER0_A0_VECTOR).
I flashed the MSPBoot first using debugger and then flashed Main app again using debugger, so my Main application (App1) is not written by bootloader but by the debugger. Now when I debug my application and enter the _enable_interrupts() it says no code available for 0xfb1c which is '_c_int00' of the bootloader (MSPBoot).
I understand that I need not to do any thing extra for vector redirection, is my understanding correct? Because after flasing the Main app the MSPBoot checks the CRC of the Main app and if it correct then it directly jumps to the application and does nothing specific to overwrite the interrupt vectors.
In FRAM, MSPBoot overwrites the interrupt vectors but when updating the Download app to Main app not in the above use case.
But while debugging the Main app I checked checked 0xFFEA in the memory browser and found the it 0xFF (attached the snapshot). Not able to figure out the problem.
Hope I could explain my problem to you.
Regards,
Deep
Hi Deep,
I think you answered your own question.
MSPBoot will "remap" the application interrupt vectors when it's receiving the new image, but the debugger doesn't do that automatically.
This happens on the following function:
uint8_t TI_MSPBoot_MI_WriteByteDirect(uint16_t addr, uint8_t data) { *(uint8_t *) addr = data; if ((addr >= APP_VECTOR_TABLE) && (addr < APP_RESET_VECTOR_ADDR)) { // If address is an interrupt vector, copy directly to interrupt table addr = (addr - APP_VECTOR_TABLE) + BOOT_VECTOR_TABLE; MPUCTL0 = MPUPW | MPUENA; // Enable access to MPU registers MPUSAM |= MPUSEG3WE; // Enable Write access *(uint8_t *) addr = data; // Write the vector MPUSAM &= ~MPUSEG3WE; // Disable Write access MPUCTL0_H = 0x00; // Disable access to MPU registers } return RET_OK; }
In your case, I assume that the debugger is placing the vectors in APP_VECTOR_TABLE and not in BOOT_VECTOR_TABLE.
I didn't really anticipate this case, but perhaps something that can be done after reset is to make sure that both tables match.
I think something like this should work to copy the table:
void TI_MSPBoot_CopyVectorTable(void) { uint16_t v_addr; uint16_t p_addr; MPUCTL0 = MPUPW | MPUENA; // Enable access to MPU registers MPUSAM |= MPUSEG3WE; // Enable Write access for (v_addr = APP_VECTOR_TABLE; v_addr < APP_RESET_VECTOR_ADDR; v_addr+=2) { p_addr = (v_addr - APP_VECTOR_TABLE) + BOOT_VECTOR_TABLE; *(uint16_t *) p_addr = *(uint16_t *) v_addr; // Copy vector } MPUSAM &= ~MPUSEG3WE; // Disable Write access MPUCTL0_H = 0x00; // Disable access to MPU registers }
As you probably already saw, the application is validated and jumped to in the following instructions, so you would have to implement the "workaround" before jumping to the application;
// Validate the application and jump if needed if (TI_MSPBoot_AppMgr_ValidateApp() == TRUE_t) TI_MSPBoot_APPMGR_JUMPTOAPP();
Regards,
Luis R
Hello Luis,
I have defined the memory map as below:
/* Download area: 4400-87FF and 10000-12C00*/
/* App area : 8800-F7FF*/
/* Boot area : F800-FFFF*/
I have attached the zip file containing the App and Boot cmd file. Can you please have a look and let me know if you foresee any problem?
Regards,
Deep
Hi Deep,
I believe your memory map will look like this:
1C00-1C05 | RAM-Reserved Area | |
1C00-1C01 | RAM-Passwd | |
1C02-1C02 | RAM-StatCtrl | |
1C03-1C03 | RAM-CI_State_Machine | |
1C04-1C05 | RAM-CI_Callback_Ptr | |
1C06-23FF | RAM-nonReserved | |
1800-19FF | Info-Boot | |
4400 | 87FF | Flash-Download Area(17K) |
4400-4401 | CRC16-Download | |
4402-4402 | CRC8-Download | |
4403-87FF | Download | |
8800-F7FF | Flash-Application Area(28K) | |
8800-8801 | CRC16-App | |
8802-8802 | CRC8-App | |
8803-F78F | App | |
F790-F7FD | Proxy Vector | |
F7FE-F7FF | App Reset vector | |
F800-FF8F | ||
F800-FF87 | Flash-Bootloader Area | |
FF88-FF8F | Flash-Shared_Vectors | |
FF90-FFFE | Vectors | |
FF90-FFFD | Flash-IntVectors | |
FFFE-FFFF | Flash-Reset | |
10000-11BFF | Flash-Upper Download Area (11K) |
I think it looks good. You probably know this, but these are a few things that come to my mind:
- Since you are dividing the download area, you need to split the application as you are programming it. If the bootloader gets data for the first 17KB (8800-CBFF) then it should place it in the first download area (4400-87FF); but if it gets something for the last 11KB (CC00-F7FF), then it should place it in the 2nd download area (10000-11BFF).
- The CRC of the application stored in 8800 is checked for the Application area (8803-F7FF), but the bootloader will also check the CRC of the download area (to make sure that the download is valid). So, you'll need to calculate the CRC for 4403-87FF and then 10000-11BFF, with the result stored in 4400.
Regards,
Luis R
Hello Luis!
I am trying to download and use the latest version of MSPBoot along with your App Note SLAA600A. However, the link directs me to MSPBoot version 1.0 and I believe based on the App Note the latest version of MSPBoot should be at least 1.2. Can you please help with an updated link? Thanks a lot!
Best regards,
Bo
Hi Luis,
Since you know that my download area is divided into to two parts. The second part is in large data memory.
Can I use uint16_t getCRC(uint8_t *pmsg, uint16_t msg_size) function as it is and just change the first para type as uint16_t * (uint16_t getCRC(uint16_t *pmsg, uint16_t msg_size) ) to calculate the CRC??
I tried it but in such case uint16_t getCRC(uint16_t *pmsg, uint16_t msg_size) and uint16_t crc16MakeBitwiseDwnld(uint16_t *pmsg, uint16_t msg_size, uint16_t *crc1) are giving different results.
Regards,
Deep
Hi Luis,
Since you know that my download area is divided into to two parts. The second part is in large data memory.
Can I use uint16_t crc16MakeBitwise(uint8_t *pmsg, uint16_t msg_size) function as it is to calculate the CRC of download image in large data memory?
Additionally I changed the MSPBoot to large data model but since then I am getting following error once I do Soft Reset:
No source available for "__mspabi_srll_1() at D:/Deep\OHFPI\FwUpgrade\MSPBoot_Dual_Image\MSPBOOT\Target\FR5739_I2C\CCS\MSPBoot\BSLBased_DualImg\MSPBoot.out:{3} 0xffff{4}"
Regards,
Deep
Hi Deep,
It will be difficult to calculate the CRC of the download area using that function since it's expecting a contiguous memory region, and it initializes the CRC at the beggining.
Additionally, the default small data memory model will use 16-bit pointers which will make it difficult to implement without changes.
As you already saw, changing to a large memory model can solve the problem of the pointer, however, you need to make sure that you cast other pointers correctly.
Since your application and the bootloader will always in 16-bits, I think it's better to use the small memory model, and just use intrinsics to access memory areas above 0xFFFF.
Note that you only need to access regions larger than 16-bits when writing/erasing that half of the download region, and when calculating the CRC of the same region.
I started working on the migration and I documented the step-by-step in the following document:
Here's the zip file with preliminary support for Wolverine. I only migrated the CCS project for FR5969 using I2C and dual-image mode. I also added support for the G2 host only.
MSPBoot_Wolverine_1_01_00_01.zip
I hope you find it useful.
Regards,
Luis R
Hi Luis,
This is definitely very helpful to me, Thanks!!
I had one more question: I want to read the FW Version from the TI.txt file. So, I created a memory section like below:
FW_VERS : origin = 0x8803, length = 0x0002
and then section like ,
.fw_vars : {} > FW_VERS
and in the main file I wrote the following lines:
#pragma SET_DATA_SECTION(".fram_vars")
unsigned char led_output = 0xA5;
#pragma SET_DATA_SECTION()
and I expected a entry on the output TI.txt file like
@8803
A5
but I could not find this entry in the output txt file.
I even tried the same thing with pragma directive
//#pragma LOCATION( x , 0x8803 );
#pragma location=0x8803
uint16_t x = 0xABCD;
but that also didn't work. I am using CCSv6 and MSP430FR5969. Can you please help me out for this.
Regards,
Deep
Hi Luis,
I have moved bss data (1.5KB) to FRAM because the RAM was not sufficient. This is causing issue when calculating the CRC while validating the application after 2nd restart and further. This is because all the bss data (moved to FRAM) in FRAM has changed and the CRC calculated now differs from stored CRC. I am writing this to get some idea to overcome this issue. The simplest idea could be to validate the App with Reset vector (CONFIG_APPMGR_APP_VALIDATE = 1). But this doesn't seem to be a good solution. Can you please suggest something to overcome this issue????
Thanks & Best Regards,
Deep
Hello Luis,
Thanks for your response. I have made the changes accordingly in the Boot and App linker file. Can you please review them and let me know your comments?
Thanks & Best Regards,
Deep
Hello Luis,
Can I somehow flash both Boot image and App image via UART (using BSL Scriptor etc)?
Or any other means like creating Special App which flashes the Bootloader image first?
Regards,
Deep
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