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MSP430F6438 UART External Clock Configuration

Other Parts Discussed in Thread: MSP430F6438

Hi,

I am working with the MSP430F6438 and I am developing a UART which uses an external clock at 32kHz.  I need my UART to be configured as follows:

1200 baud rate, 1 start bit, 8 data bits, 1 odd parity bit, 1 stop bit.  The UART seems to communicate just fine if I am using an internal clock (UCA1CTL1 |= UCSSEL_2), however, when switching to UCSSEL_0 I am unable to transmit/receive anything.  My code is posted below.

Any help is much appreciated,

Thanks,

Rafael

void UART_setup(void)
{
/* set XT1 oscillator XCAP to 6pF */

while(BAKCTL & LOCKIO)                                               /* Unlock XT1 pins for operation */
BAKCTL &= ~(LOCKIO);

UCSCTL6 &= ~(XT1OFF);                                              /* XT1 On */
UCSCTL6 |= XCAP_1;                                                    /* XCAP = 6pF */

do
{
UCSCTL7 &= ~(XT1LFOFFG + DCOFFG);                   /* Unlock XT1 pins for operation */
SFRIFG1 &= ~OFIFG;                                                     /* Clear fault flags */
}while (SFRIFG1&OFIFG);                                              /* Test oscillator fault flag */

UCSCTL6 &= ~(XT1DRIVE_1);                                      /* Enable XT1 */

P8SEL |= BIT2 + BIT3;                                                     /* P8 TX/RX select */
P8DIR |= BIT2 + BIT3;                                                     /* P8 TX/RX direction */

UCA1CTL1 = UCSWRST;                                               /* **Put state machine in reset** */
UCA1CTL1 |= UCSSEL_0;                                             /* External Clock */
UCA1CTL0 |= UCPEN;                                                   /* Parity enabled (odd) */
UCA1BR0 = 27;                                                               /* 32kHz 1200 (see User's Guide) */
UCA1BR1 = 0;                                                                 /* 32kHz 1200 */
UCA1MCTL = UCBRS_2 + UCBRF_0 + UCBRF0;       /* Modulating */

UCA1CTL1 &= ~UCSWRST;                                          /* **Initialize USCI state machine** */
UCA1IE = UCRXIE|UCTXIE;                                         /* Enable USCI_A1 TX/RX interrupt */
}

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