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Tool/software: Code Composer Studio
I'm using MSP430G2553 in I2C-Slave mode and I have enabled UCB0TXIE bit.Now the master device can receive the right data from the slave device, but I find that when I use the master get a data from the slave one time, the slave will go into the TX interrupt service twice.
Is this normal or I do not have a right configuration?
thanks!
This is the I2C configuration:
P1SEL |= SDA_PIN + SCL_PIN; // Assign I2C pins to USCI_B0
P1SEL2 |= SDA_PIN + SCL_PIN; // Assign I2C pins to USCI_B0
UCB0CTL1 |= UCSWRST; // Enable SW reset
UCB0CTL0 = UCMODE_3 + UCSYNC; // I2C Slave, synchronous mode
UCB0I2COA = slave_address; // set own (slave) address
UCB0CTL1 &= ~UCSWRST; // Clear SW reset, resume operation
IE2 |= UCB0TXIE + UCB0RXIE; // Enable TX interrupt
UCB0I2CIE |= UCSTTIE; // Enable STT interrupt
TI_start_callback = SCallback;
TI_receive_callback = RCallback;
TI_transmit_callback = TCallback;
This is the interrupt service code:
#pragma vector=USCIAB0TX_VECTOR
__interrupt void usci_i2c_data_isr(void)
{
if (IFG2 & UCB0TXIFG)
TI_transmit_callback(&UCB0TXBUF);
else
TI_receive_callback(UCB0RXBUF);
}
Hi Clemens, thanks to your response.
The yellow waveform is SCL signal, the blue waveform is SDA signal, the slave address is 0x48. The master device starts a communication, and read data from the slave device.
Though debug, I find that when the master finish sending slave address(7 bits) and read command(1 bit), the slave goes into I2C TX interrupt one time.when the master finish reading a byte from the slave, the slave goes into I2C TX interrupt again.
Thanks!
[Your oscilloscope has a screen shot function.]
This behaviour is OK. See section 17.3.4.1.1 of the User's Guide:
If the master requests data from the slave the USCI module is automatically configured as a transmitter and UCTR and UCBxTXIFG become set. The SCL line is held low until the first data to be sent is written into the transmit buffer UCBxTXBUF. Then the address is acknowledged, the UCSTTIFG flag is cleared, and the data is transmitted. As soon as the data is transferred into the shift register the UCBxTXIFG is set again.
You get the TX interrupt because the hardware wants to know what the next byte to be sent is. This happens as soon as possible (while the previous byte is being sent) to avoid delays between the bytes, so it's possible to get the interrupt even if the master will not request the next byte.
You could just ignore the second TX interrupt. However, you do not actually know if the master requests another byte or not. If it does and you did not write anything to TXBUF, the bus will hang.
So you should write some value. Just use the same value as the previous byte, or a zero, or 0xFF; the actual values does not really matter.
Hi Clemens:
Many thanks for your help !
I use a global variable to identify which data to be sent, and the TXBUF in one read period will be filled with the same value as you suggested.
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