Compiler/MSP430F5632: Why is there an unknown error while I2C connection

void InitI2C(unsigned char i2c_address)
{
	//i2c_address should shift for a bit, because address of I2C assign to buffer ignore last bit
	//use RXD mode to send start condition this bit is set to Hi
	//use TXD mode to send start condition this bit is set to Lo
	//EX: i2c_address define as 0x50(01010000) actually assign address is 0xA0(10100000),
	//but the LSB is decided by RXD mode or TXD mode
	//Recommended initialisation steps of I2C module as shown in User Guide:
	UCB0CTL1 |= UCSWRST;					// Enable SW reset
	UCB0CTL0 = UCMST + UCMODE_3 + UCSYNC;	// I2C Master, synchronous mode
	UCB0CTL1 = UCSSEL_2 + UCSWRST;			// Use SMCLK, TX mode, keep SW reset
	UCB0BR0 = 0x12;				// fSCL = SMCLK/12 = ~100kHz
	UCB0BR1 = 0x00;
	UCB0I2CSA  = i2c_address;				// define Slave Address
											// In this case the Slave Address
											// defines the control byte that is
											// sent to the EEPROM.
	UCB0I2COA = 0x48;						// own address.
	UCB0CTL1 &= ~UCSWRST;					// Clear SW reset, resume operation
	if (UCB0STAT & UCBBUSY)					// test if bus to be free
	{										// otherwise a manual Clock on is generated
		P3SEL &= ~SCL;			// Select Port function for SCL
		P3OUT &= ~SCL;
		P3DIR |= SCL;			// drive SCL low
		P3SEL |= SDA + SCL;	// select module function for the used I2C pins
	}
}

void I2C_Multiple_Read_Write(unsigned char Length,unsigned short number_of_read)
{
	unsigned int i;
	unsigned short loop;
	_DINT();
	while (UCB0STAT & UCBUSY);         // wait until I2C module has
                                       // finished all operations
	//Transmit
	UCB0CTL1 |= UCTR;                  //  UCTR=1 => Transmit Mode
	IFG2 &= ~UCB0TXIFG;//  disable Receive ready interrupt
	IE2 &= ~UCB0RXIE;//  enable Transmit ready interrupt
	IE2 |= UCB0TXIE;
	UCB0CTL1|= UCTXSTT;                //  send start condition
	while(UCB0CTL1 & UCTXSTT)          //  Ensure start condition got sent
	{
		if(!(UCNACKIFG & UCB0STAT))    // Break out if ACK received
			break;
	}
	for(loop=0;loop<Length;loop++)
	{
		while (!(IFG2 & UCB0TXIFG));       //  check if UCB0TXBUF=empty
		UCB0TXBUF = I2C_data[loop];
		i=0;
		//while (!(IFG2 & UCB0TXIFG))
		//{
			//if i2c hang on, ignore I2C data
			//i++;
			//if (i==9999)
				//break;
				//WDTCTL =0;//reset
		//}
	}
	while (!(IFG2 & UCB0TXIFG)); 	   //  check if UCB0TXBUF=empty

	//Receive
	UCB0CTL1 &= ~UCTR;                 //  UCTR=0 => Receive Mode
	IFG2 &= ~UCB0RXIFG;
	IE2 &= ~UCB0TXIE;                  //  disable Transmit ready interrupt
	IE2 |= UCB0RXIE;                   //  enable Receive ready interrupt
	UCB0CTL1 |= UCTXSTT;               //  send start condition
	i=0;
	while(UCB0CTL1 & UCTXSTT)          //  Ensure start condition got sent
	{
		if(!(UCNACKIFG & UCB0STAT))    // Break out if ACK received
			break;
	}
	for(loop=0;loop<number_of_read;loop++)
	{
		while (!(UCB0RXIFG & IFG2));       //recive data
		I2C_data[loop]=UCB0RXBUF;
	}
	UCB0CTL1 |= UCTXSTP;               //  send stop condition
	while(UCB0CTL1 & UCTXSTP);         //  Ensure stop condition got sent
	__no_operation();
	UCB0CTL1 |=  UCSWRST;
	UCB0CTL1 &= ~UCSWRST;
	_EINT();
}

void Set_I2C_Slave(void)
{
	UCB1CTL1 |= UCSWRST;                      // Enable SW reset
	UCB1CTL0 = UCMODE_3 + UCSYNC;             // I2C Slave, synchronous mode
	UCB1I2COA = 0x48;                         // Own Address is 048h
	UCB1CTL1 &= ~UCSWRST;                     // Clear SW reset, resume operation
	UCB1IE |= UCSTPIE + UCSTTIE + UCRXIE;// + UCTXIE;// Enable STT, STP & RX, TX interrupt
}

//*********************************
//* I2C Interrupt Service Routine *
//*********************************
#pragma vector = USCI_B1_VECTOR
__interrupt void USCI_B1_ISR(void)
{
	switch(__even_in_range(UCB1IV,12))
	{
		case 0:// Vector  0: No interrupts
		break;
		case 2:// Vector  2: ALIFG
		break;
		case 4:// Vector  4: NACKIFG
		break;
		case 6:// Vector  6: STTIFG
			UCB1IFG &= ~UCSTTIFG;
		break;
		case 8:// Vector  8: STPIFG
			UCB1IFG &= ~UCSTPIFG;
			if((I2C_Stat & 0x40)==0x40)
			{
				I2C_Stat=0;
				UCB1IE &= ~UCTXIE;//Disable TX interrupt of I2C
			}
		break;
		case 10:// Vector 10: RXIFG
			I2C_data[(I2C_Stat&0x3F)] = UCB1RXBUF;// Get RXD byte into buffer
			I2C_Stat++;
			if((I2C_Stat&0x3F)>56)
			{
				I2C_Stat|=0x80;
			}
		break;
		case 12:// Vector 12: TXIFG
			UCB1TXBUF = I2C_data[I2C_TX_loop++];
		break;
		default:
		break;
	}
}

void I2C_RX_data_operation(void)
{
	/* I2C data communication, X is transmit
	variables		I2C_data array
	Up_Light[5];	 0  1  2  3  4
	Dn_Light[5];	 5  6  7  8  9
	FLR_Light[5];	10 11 12 13 14
	Stat[3];		 X 15  X
	FLR_Dir;		 X
	Total_FLR;		16
	Connect_Stat;	17
	Car_OP[2];		18 19
	Dir_Operation;	 X
	Spec[5];		20 21 22 23 24
	FLR_BTN[5];		25 26 27 28 29
	Up_BTN[5];		30 31 32 33 34
	Dn_BTN[5];		35 36 37 38 39
	Dis_FLR_BTN[5];	40 41 42 43 44
	Dis_Up_BTN[5];	45 46 47 48 49
	Dis_Dn_BTN[5];	50 51 52 53 54
	Car_IP[2];		55 56*/
	unsigned char loop;
	if((I2C_Stat&0x80)==0x80)
	{
		//***************************
		//* Receive From I2C Master *
		//***************************
		for(loop=0;loop<5;loop++)
		{
			Up_Light[loop]=I2C_data[loop];//0~4
			Dn_Light[loop]=I2C_data[(loop+5)];//5~9
			FLR_Light[loop]=I2C_data[(loop+10)];//10~14
			Spec[loop]=I2C_data[(loop+20)];//20~24
			FLR_BTN[loop]=I2C_data[(loop+25)];//25~29
			Up_BTN[loop]=I2C_data[(loop+30)];//30~34
			Dn_BTN[loop]=I2C_data[(loop+35)];//35~39
			Dis_FLR_BTN[loop]=I2C_data[(loop+40)];//40~44
			Dis_Up_BTN[loop]=I2C_data[(loop+45)];//45~49
			Dis_Dn_BTN[loop]=I2C_data[(loop+50)];//50~54
		}
		Stat[1]=I2C_data[15];
		Total_FLR=I2C_data[16];
		Connect_Stat=I2C_data[17];
		Car_OP[0]=I2C_data[18];
		Car_OP[1]=I2C_data[19];
		Car_IP[0]=I2C_data[55];
		Car_IP[1]=I2C_data[56];
		//***************************
		//* Send back to I2C Master *
		//***************************
		I2C_data[0]=Stat[0];
		I2C_data[1]=Stat[2];
		I2C_data[2]=FLR_Dir;
		I2C_data[3]=Dir_Operation;
		I2C_Stat=0x40;//TX mode
		I2C_TX_loop=0;
		UCB1IE |= UCTXIE;//Enable TX interrupt of I2C
	}
}