MSP430I2040: ADC programming

SD24PRE0= 0xFF;              // delay in next conversion of channel 0
SD24PRE1= 0xFF;              // delay in next conversion of channel 1

#include <msp430.h> 

/*
 * main.c
 */
unsigned int value1[401];
unsigned int value2[401];
//unsigned int value3[200];
unsigned int i,j,k;
unsigned char val_low,val_high;
//unsigned int g;

void main(void) {
    WDTCTL = WDTPW | WDTHOLD;	// Stop watchdog timer
    P2DIR |= BIT3;					// Set P1.0 to output direction
        	SD24CTL=SD24REFS;           // Internal Reference
        	SD24CCTL0|=SD24GRP;    //Group with channel 1
        	SD24CCTL1|=SD24IE;   // Group with channel 2 and enabling interrupt
        	SD24INCTL1=0x20;          // Gain=16 for channel 1
        	value1[0]=0xFFFF;
        	value2[0]=0xFFFF;

        	for (i=0; i<8000; i++)
        	                   			{
        	                   				__delay_cycles(16000);    //1ms delay
        	                   			}

        	    P1SEL0|= BIT2|BIT3;          //P1.2,3 eUSCI_A function
        		P1SEL1&= ~(BIT2|BIT3);
        		UCA0CTLW0|=UCSWRST;          // Hold eUSCI in reset
        		UCA0CTLW0|= UCSSEL_2;        //SMCLK
        		//UCA0CTLW0|=UCPEN|UCPAR;
        		//UCA0BR0=0x8E;                // 115200 baud
        		//UCA0BR1=0x00;
        		//UCA0MCTLW=0x0022;
        		   UCA0BR0   = 0xAA;                       // 9600 baud
        		   UCA0BR1   = 0x06;
        		   UCA0MCTLW = 0xD600;                     // 16.384MHz/9600 = 1706.6667 (See UG)
        		UCA0CTLW0&=~(UCSWRST);       //Release from reset
               //g=0;
               j=0;



                               i=1;
                   			SD24CCTL1|=SD24SC;            // Set bit to start conversion

                   			__bis_SR_register(GIE);
                 while(1)
                 {
                   if(j==1)
                   {
                   SD24CCTL1&=~(SD24IE);
                   i=1;
                   for (k=0;k<=400;k++)
                   {
                    val_high=(value1[k]>>8)&(0xFF);
                   	while (!(UCA0IFG&UCTXIFG)); // USCI_A0 TX buffer ready?
                   	UCA0TXBUF = val_high;      // TX -> RXed character
                   	//__delay_cycles(32000);
                   	val_low=value1[k]&(0xFF);
                    while (!(UCA0IFG&UCTXIFG)); // USCI_A0 TX buffer ready?
                   	UCA0TXBUF = val_low;      // TX -> RXed character
                   	//__delay_cycles(32000);


                   	val_high=(value2[k]>>8)&(0xFF);
                    while (!(UCA0IFG&UCTXIFG)); // USCI_A0 TX buffer ready?
                   	UCA0TXBUF = val_high;      // TX -> RXed character
                   //	__delay_cycles(32000);
                   	val_low=value2[k]&(0xFF);
                   	while (!(UCA0IFG&UCTXIFG)); // USCI_A0 TX buffer ready?
                   	UCA0TXBUF = val_low;      // TX -> RXed character
                   	//__delay_cycles(32000);
                   }
                   j=0;
                   SD24CCTL1|=SD24IE;
               }

        }
	
}
#pragma vector=SD24_VECTOR
__interrupt void SD24_ISR(void)
{

	value1[i]=SD24MEM0;            // Voltage
	value2[i++]=SD24MEM1;             // Current
	//value3[i++]=g++;
	if(i==401)
	{
		j=1;
		//g=0;
	}

	P2OUT ^= BIT3;				// Toggle P1.0 using exclusive-OR

    }