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MSP432P401M: Why I can not write R14 and xPSR register by SWD?

Xin Chen
Intellectual 590 points

Part Number: MSP432P401M

Hi,

      I implement a SWD loader tool myself.(SWD-debug interface include SWCLK and SWDIO signals).

      After I use this tool wtite location from 0x00 t0 0x03 with 0x33221100,I can not write core registers include R4,xPSR.

I always get Fault ACK when I operate core(ARM CPU) registers.

     How should I recover the device by SWD interface?

    Best regards~

Xin Chen 

       

  • 0
    TI__Guru**** 244380 points

    Hello Xin,

    Questions regarding the CPU debug architecture should always refer to the ARM Debug Architecture Specification. This is a document hat TI does not own or supply and must be referred to from ARM's web documents. I am sorry we cannot provide specifics on the CPU debug.

  • 0 in reply to Amit Ashara
    Intellectual 590 points

    Hi,Amit , 

           Thank you advise.

          In deed,I have some practice on ARM debug using by  JTAG and SWD,such as enable debug DAP,halt cpu,run cpu,and write/read memory of device.

         And I can implement it on blank device(MSP432P401) successfully(The device does not  have any application code in embed flash).

          So I think something is associated with the boot procedure of the device.

         Such as I can not halt the ARM core when the device is in reset state.But that is very useful for me to stop running user application in embed flash.

         And I find It is difficult to halt cpu after downloading usr application code into embed flash.

        Would you help me check this problem?

        Thank you very much.

    Best regards~

    Xin Chen  

           

         

  • 0 in reply to Amit Ashara
    Intellectual 590 points
    Hi,Amit ,

    Thank you advise.

    In deed,I have some practice on ARM debug using by JTAG and SWD,such as enable debug DAP,halt cpu,run cpu,and write/read memory of device.

    And I can implement it on blank device(MSP432P401) successfully(The device does not have any application code in embed flash).

    So I think something is associated with the boot procedure of the device.

    Such as I can not halt the ARM core when the device is in reset state.But that is very useful for me to stop running user application in embed flash.

    And I find It is difficult to halt cpu after downloading usr application code into embed flash.

    Would you help me check this problem?

    Thank you very much.

    Best regards~

    Xin Chen
  • 0 in reply to Xin Chen
    TI__Guru**** 244380 points
    Hello Xin

    Do you have setup any of the security parameters like JTAG lock or IP Protection?

    As I mentioned earlier, we do not provide low level debug tools other than emulator like XDS110, etc, I would advise checking it with ARM or a 3rd party developer that develops debuggers.
  • 0 in reply to Amit Ashara
    Intellectual 590 points

    Hi,Amit，

         Sorry,I do not know since the executing application binary code is from burnning house.

         I also use xds100v2  paired with uniflash to download that application binary code into device,then xds100V2 can not connect the device again.

         And I do more tests:do power off and power on procedure five times on the device,then the xds100v2 can connect the device again.

        Since I am familar with the low level interface(physicall layer) of SWD,JTAG,and ARM debug interface,I will provide more information something about SWD access  to analyze this problem.

       SWD access abnormal phenomenon:SWD config bus access size(8bit,16bit or 32bit) and address increase  mode fail by configing CSW registers of debug module.

    And more,I will describe the SWD access abnormal phenomenon more low level.I foud that the ACK  of SWD packet is always wait state whatever I try.It looks like  the AHB/PPB bus is always

    busy.

       Would you know what's happend and  how to use XDS100v2 solve this problem?

      Thank you very much.

       Best regards~

    Xin Chen 

  • 0 in reply to Amit Ashara
    Intellectual 590 points
    Hi,Amit,
    I have read some sections of MSP432P4xx SimpleLink™ Microcontrollers Technical Reference Manual.
    Refer to manual,setup of JTAG/SWD lock and IP protection depends on flash boot override mailbox(FL_BOOTOVER_MAILBOX),which locates at in the information memory of flash(0x0020_0000 to 0x0020_0FFF) .
    I have checked the application binary code.There is no data in the range (0x0020_0000 to 0x0020_0FFF).
    So ,I think JTAG/SWD lock and IP protection is not enabled.
    Are you agree it?
    Thanks~
    Best regards~
    Xin Chen
  • 0 in reply to Xin Chen
    TI__Guru**** 244380 points
    Hello Xin,

    The data in the information section of the memory will not be contained in the binary image as it is programmed via the mailbox. Now you can always check with the burning house as to the content of the binary image or the original source code. I would expect you are trying to debug a code that your organization owns.
  • 0 in reply to Amit Ashara
    Intellectual 590 points

    Hi,Amit,

          Thank you very much.

          Best regards~

    Xin Chen 

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