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Part Number: MSP432P401R
Tool/software: Code Composer Studio
Hello Fellows,
I have a small problem, i need integrate two devices SPI communication. I have tried the code of each one separately, in the EUSCI_B0, and the code for both devices work. now I need to put each one in the EUSCI_A and EUSCI_B for example. But I can't get put it working. Can anyone give me a example, there is anyone here who had the same problem.
Thanks
Hi,
I have forwarded your query to the relevant team. They will get back to you as soon as possible.
Thanks
Hello,
Which example are you using as your base?
The MSP432P4 SDK has examples of how to use eUSCI peripheral in SPI mode. You will have to modify these examples to use the correct peripheral (EUSCI_A0 or EUSCI_B0 etc) and the correct Port Mapping for the peripheral. Please refer the sub-sections "Signal Descriptions" and "Pin attributes"in the Datasheet for the correct Pin muxing information.
Thanks,
Sai
Hello Sai Reddy,
Thanks for your reply, I have done the following code and it woks, the problem is now I have a second device and I need integrate him, with same initialisation on the same SPI (EUSCI_B0)I get it working, but when I change the SPI, with the same code with a few "changes" for the other EUSCI_A1 for exemple doesn't work.
void init_EUSCI(void){ P1->SEL0 |= BIT6 + BIT5; P1->DIR |= IT5 + BIT6; P5->OUT |= BIT0; EUSCI_B0->CTLW0 |= EUSCI_B_CTLW0_SWRST; // Put eUSCI state machine in reset EUSCI_B0->CTLW0 |= EUSCI_B_CTLW0_MST | // Set as SPI master EUSCI_B_CTLW0_SYNC | // Set as synchronous mode EUSCI_B_CTLW0_CKPL | // Set clock polarity high EUSCI_B_CTLW0_MODE_0 | EUSCI_B_CTLW0_MSB ; EUSCI_B0->CTLW0 |= EUSCI_B_CTLW0_SSEL__SMCLK; EUSCI_B0->BRW = 4; // /2,fBitClock = fBRCLK/(UCBRx+1). EUSCI_B0->CTLW0 &= ~EUSCI_B_CTLW0_SWRST; }
on the other and the same integration to the same divice with EUSCI_A1 module doesn't work.
void init_EUSCI(void){ P2->SEL0 |= BIT1 + BIT3; P2->DIR |= BIT1 + BIT3; P3->OUT |= BIT0; EUSCI_A1->CTLW0 |= EUSCI_A_CTLW0_SWRST; // Put eUSCI state machine in reset EUSCI_A1->CTLW0 |= EUSCI_A_CTLW0_MST | // Set as SPI master EUSCI_A_CTLW0_SYNC | // Set as synchronous mode EUSCI_A_CTLW0_CKPL | // Set clock polarity high EUSCI_A_CTLW0_MODE_0 | EUSCI_A_CTLW0_MSB ; EUSCI_A1->CTLW0 |= EUSCI_A_CTLW0_SSEL__SMCLK; EUSCI_A1->BRW = 4; // /2,fBitClock = fBRCLK/(UCBRx+1). EUSCI_A1->CTLW0 &= ~EUSCI_A_CTLW0_SWRST; }
Hello,
Please refer to this related thread: https://e2e.ti.com/support/microcontrollers/msp430/f/166/t/566787#pi320995=1
Thanks,
Alexis
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