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CCS/MSP432P401R: MSP432P401R SPI config

Part Number: MSP432P401R

Tool/software: Code Composer Studio

Hello fellows, 

I have made the following function, to connect with a device by spi:

    CS->KEY  = CS_KEY_VAL;                                 /*UNLOCK CS MODULE ACCESS*/
    CS->CTL0 = CS_CTL0_DCORSEL_4;                          /*SELECT DCO = 24MHz*/
    CS->CTL0 = 0x00;
    CS->CTL1 = CS_CTL1_DIVS_3 |                            /*SOURCE DIV  f(SMCLK)/8 = 3MHz*/
               CS_CTL1_SELA_2 |                            /*SELECT ACLK  = REFOCLK*/
               CS_CTL1_SELS_3 |                            /*SELECT SMCLK = DCOCLK*/
               CS_CTL1_SELM_3;                             /*SELECT MCLK  = DCOCLK*/
    CS->KEY = 0x00; 

    /*SET SPI OPTION SELECT*/
    P1->SEL0 |= MOSI | MISO | SCK_SELECT;              /*SET 3 PIN SPI PERIPHERAL BITS*/
    /*SET SPI OUT DIRECTION*/
    P1->DIR |=  MOSI | SCK_SELECT;                     /*CLOCK AND DIROUT AS OUTPUT*/
    /*CLEAR SPI OUT DIRECTION*/
    P1->DIR &= ~(SCK_SELECT);                          /*DIN AS INPUT*/

    /*SPI SETUP DEFENITION*/
    EUSCI_B0->CTLW0 |= EUSCI_B_CTLW0_SWRST;            /*PUT eUSCI STATE MACHINE IN RESET*/
    EUSCI_B0->CTLW0  = EUSCI_B_CTLW0_SWRST |           /*REMAIN eUSCI STATE MACHINE IN RESET*/
                       EUSCI_B_CTLW0_MST   |           /*SET AS SPI MASTER*/
                       EUSCI_B_CTLW0_SYNC  |           /*SET AS SYNCHRONOUS MODE*/
                       EUSCI_B_CTLW0_CKPL  |           /*SET CLOCK POLARITY HIGH*/
                       EUSCI_B_CTLW0_MSB   ;           /*MSB FIRST*/

    EUSCI_B0->CTLW0 |= EUSCI_B_CTLW0_SSEL__SMCLK;      /*SMCLK*/
    EUSCI_B0->BRW = 0x0C;                             /*fBitClock = fBRCLK/UCBRx[~1000KHz]*/
    EUSCI_B0->CTLW0 &= ~EUSCI_B_CTLW0_SWRST;          /*CLEAR SW RESET, RESUME OPERATION*/

SPI shall operate in:
Synchronous mode,
3-pin SPI,
Master mode,
8-bit data,
MSB first,
Clock polarity low,
and the BRW should be approximately 1MHz.
It's anything wrong with my code?
  • > CS->CTL0 = CS_CTL0_DCORSEL_4; /*SELECT DCO = 24MHz*/
    > CS->CTL0 = 0x00;

    I'm not sure what CTL0=0 does, but I think you only need one of these.
    ------
    >and the BRW should be approximately 1MHz.
    >CS->CTL1 = CS_CTL1_DIVS_3 | /*SOURCE DIV f(SMCLK)/8 = 3MHz*/
    [...]
    > EUSCI_B0->BRW = 0x0C; /*fBitClock = fBRCLK/UCBRx[~1000KHz]*/

    My calculator says 3MHz/12=250kHz, not 1MHz.
    ------
    > Clock polarity low,
    > EUSCI_B_CTLW0_CKPL | /*SET CLOCK POLARITY HIGH*/

    The comment is correct, so there's a discrepancy here.
  • Sorry bruce,

    Thanks for correcting this errors, I now have the SPI to work correctly...

     the BRW should be approximately 1MHz.
    > CS->CTL1 = CS_CTL1_DIVS_3 | /*SOURCE DIV f(SMCLK)/8 = 3MHz*/
    [...]
    > EUSCI_B0->BRW = 0x03; /*fBitClock = fBRCLK/UCBRx[~1000KHz]*/

    the comment really is wrong should be
    EUSCI_B_CTLW0_CKPL | / * SET CLOCK POLARITY LOW * /

    thank you

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