Other Parts Discussed in Thread: MSP430F2013,
Using two MSP430s in a design and they communicate with each other using I2C.
There is an MSP430G2453 (slave) talking with an MSP430F2013 (master).
The MSP430F2013 is clocking the I2C out at 500kHz.
The following has just been noticed in the datasheet for the MSP430G2453:
Is this driving the I2C slave (MSP430G2453) too fast?
What is the likely outcome of this situation?
Does Fscl between master and slave always have to be matched for I2C? Or does internal hold circuits on slave devices wait for a rising or falling edge to be ready to receive data, therefore difference between 400kHz slave and 500kHz master may not cause a problem?
Any Help or advice you can provide here is much appreciated