This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Correct me wherever I'm wrong, but ...
To code-protect our MSP430F5438 (non-A) product, we
1. must "soft lockout" the JTAG interface by setting locations ... (8 bytes) to anything non-0, non-FFs (this is not a "password", i.e., value is irrelevant)
2. should salt unused interrupt vectors with randomized values, and record all, comprising an effective BSL password
To reprogram our thus code-protected product, we
1. cannot accomplish anything through JTAG, not even erase
2. must access MSP through BSL, supplying the 256-bit password created above
3. must remove JTAG soft lockout, either by erasing locations ... to FFs, or overwriting them to 00s, or else by mass erasing entire chip.
The TI-BSL in MSP430F5438 is in protected FLASH, such that it will not be erased by these steps, but only by extremely deliberate measures that disable BSL protection (as for customization)
The TI-BSL in MSP430F5438 requires high-speed (5-12 MHz) clocking on XT2, either by crystal or waveform input.(wrong; that was USB requirement only)
Our product which utilizes DCO and has XT2 pins unconnected, must have clocking applied to XT2 pins for BSL to function.
BSL access into MSP430F5438 can be accomplished through MSP-FET pod; via same pins and header as JTAG (except for clocking requirement above); using PC software UniFlash v5.3.1 or better.(wrong; BSL communicates on different pins than JTAG; MSP-FET documentation (e.g. at http://www.ti.com/tool/MSP-FET#2) asserts BSL capability but does not illustrate connections)
Yes?
Hi
The MSP430F5438 BSL don't need the high-speed (5-12 MHz) clocking on XT2. Where saw use to do like that? It use UART.
Ah! good catch -- I was looking at a paragraph under USB. NEVERMIND XT2. So MSP430F5438 BSL will clock itself internally for 9600bps, right?
But the specification ...
"... via same pins and header as JTAG ..."
... seems to be wrong; I see some documentation demanding "P1.1/TA0.0" and "P1.2/TA0.1" -- which are NOT the same as we use for JTAG programming?
I asked (by rhetorically stating, without a question mark):
BSL access into MSP430F5438 can be accomplished through MSP-FET pod; via same pins and header as JTAG (except for clocking requirement above); using PC software UniFlash v5.3.1 or better.
... and someone posted "Yes."
But elsewhere I read that the BSL pins are different from JTAG pins.
Hi
You can see the define pins for BSL and JTAG at page 44 in the datasheet
Dietmar Walther wrote elsewhere, on a related question:
As mentioned the JTAG lock signature programming should work via JTAG, the MSP debug stack supports it.
Unlocking via BSL will also work when you program the signature to 0x0000 0000.
However if you afterwards want to lock again you need do a segment erase or complete erase of the BSL memory to reprogram a lock signature.
However erase as well as complete BSL area reprogramming can cause problems that’s why we have the SYS4, FLASH32 and the note in the datasheet.
Thus we understand reversible code protection (beyond maybe just one time) is not feasible on MSP430F5438 (pre-A) parts.
**Attention** This is a public forum