• State Resolved
  • Locked Locked
  • Replies 5 replies
  • Answers 1 answer
  • Subscribers 79 subscribers
  • Views 207 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

MSP430FR5969: Port Configuration issue

Manish_Thakur
Genius 5085 points
Part Number: MSP430FR5969
Other Parts Discussed in Thread: LDC1101

Hi experts,

I'm using USCBo for SPI which is using p1.7 and 1.7 as data lines now the sensor I connected is LDC1101 there they have mentioned for DRDY if bit is set we'll see a shift of low to high in SDO pin. How we can configure as Interrupt which keeping the same configuration for SPI. Please say for example MISO line is P1.7 and there only we are seeing shift then how we can configure P1.7 as interrupt while it has been configured as MISO. Please clear my knowledge regarding this.

  • 0
    TI__Genius 17960 points

    Hi Manish,

    I am not sure if I understood what you're trying to address, but detecting a transition on the Master Input would e.g. be possible by connecting the physical connection in parallel to an interrupt capable GPIO, this could be just a normal interrupt capable pin, or e.g. a Comparator input, including activating the interrupt of the respective pin. The mentioned transition would then trigger an interrupt on the master device.

    Best regards

    Peter

  • 0
    Guru 95405 points

    You can disconnect the MISO pin from the SPI at any time, by clearing the PSEL bit(s). Per User Guide (SLAU367P) Sec 12.2.5, the interrupt mechanism is disabled while any of the PSEL bits is set. (I suppose this means the IFG isn't set, rather than the IE being ignored, but you should probably check.) So I expect you could leave the IE set and set/clear the PSEL bits around your actual SPI transaction. Since SDO goes hi-Z when CSB isn't asserted, you'll probably want to apply the REN resistor to avoid false indications.

    This does mean that you have to have some idea of when the completion is likely to occur. LDC1101 data sheet (SNOSD01D) Sec 9.1.15 says that (in general) you have to do this anyway (if you use this mode), 

    Alternatively, you could poll for INTB using the SPI, since it can only occur while CSB is asserted.

  • 0 in reply to Bruce McKenney
    Genius 5085 points

    Thanks for valuable information

  • 0 in reply to Manish_Thakur
    TI__Genius 17960 points

    Hi Manish,

    based on your feedback, I am closing this thread.

    Best regards

    Peter

  • 0 in reply to Peter Spevak
    Genius 5085 points

    Hi Peter,

    sure

**Attention** This is a public forum