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MSP430FR59941: Why does persistent data and IPE Data structure need to be 1KB aligned and placed at the start of FRAM?

Part Number: MSP430FR59941

Hi,

My question is why does the persistent data section need to be 1KB aligned?  and why does it need to be at the start of FRAM?

What design considerations was considered to put those data sections there?

What possible pitfalls would be created by removing the alignment or changing its location?

The same question also applies to the IPE data sections right below it

Since I only have a few bytes of persistent variables, this alignment is basically wasting close to 1KB worth of FRAM that I would like to use for something else

The closest thing I found is in SLAU157as.pdf (Code Composer Studio™ IDE v10.x for MSP430™ MCUs) Section 5.3 FRAM Write Protection (FRWP), but it doesn't explain why

It says: "When the application code uses persistent data type, the size of persistent data is automatically calculated and aligned with 1kB size".

When I look in the linker file, I see that the .TI.persistent is aligned to 1KB (and I assume this is the part where the "automatic" alignment happens).

Thanks,

Aaron Chuang

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