Designing Capacitive Touch Pads for the MSP430G2553 using EAGLE

Yes, EAGLE doesn't allow copper to be placed in a device footprint, except for SMD pads. If you try, DRC will complain about it.
Reason is that you cannot assign a signal name to the copper that dynamically matches the signal connected to the pad. So unless you specify separate pads for each signal, DRC will cry all day.

We solved this problem by introducing two additional copper layers that are not checked by DRC. Layer 60+61 (IIRC) are fine for this, as mirroring applies to them (swaps their content). Now the device sijmply gets an SMD pad, and the copper shape goes to layer 60/61 and as well to the restrict layers (to keep the autorouter form placing traces there).
You then only have to tell the PCB manufacturer that these two layers needs to be included in the top/bottom layer copper (which usually isn't a problem).

We use it for cooling pads, solder-jumpers and, guess, for touch pads :)

Kyle,

in Eagle is very easy to create capacitive touch pads. In Eagle Layout you can select the Polygon function to draw filled polygons in any layer. These filled polygons can be renamed and assigned to any desired signal name if you draw them in any signal layer. In this case they will be the TOP and BOTTOM layers.

The drawing options for the polygon outer line are the same as the ones for nets, so you can have any shape. For the inner polygon the option include copper filled, ... 

You can even draw subtractive polygons.

BR

Vitor Barbosa

Hi,

I have been using msp430g2553 for my project. in active mode at 1.8 Volt i am getting current around

138uA. sleep mode i am getting  0.138uA. but from datasheet i saw that the sleep mode current is around 0.5uA?

Am i getting a wrong result both for active and sleep mode?

Thanks

Sumon

sumon bose said:

Hi, .... Thanks Sumon

This question doesn't belong in this thread. Start a new post.

@Vitor Barbosa: Thank you very much for your response! I apologize I was not able to reply quickly. As I was waiting for a reply, I designed my capacitive touch pad sensor array using a 'wire' rather than the 'polygon' function. Is it best to use the polygon function? I noticed using the polygon function it appears to be filled with a color, where as my sensor array I created is just a simply wire with no fill.

Would I leave the sensor array as a symbol and leave the pour as solid?

Thank you,

Kyle

Kyle Hunter said:

I designed my capacitive touch pad sensor array using a 'wire' rather than the 'polygon' function.

Wires are wires. They have a path and a thickness. A polygon defines an outline which is fille dwiht copper (except if th epolygon is cressed by a signal, then the signal wire is isolated form the plygon content).

Sinc ecapacitive touch pads use electrostatic laws, the capacitance is based on distance and surface of the electrodes forming the capacitor. Not the outer border, but the whole plane of the sensor counts for this. Capacitance is build by the amount of copper surface, up to the size of the other electrode (the finger tip). Just having a wired outline doesn't give much capacitance, even less capacitance change by the distance to the fingertip and therefore not a good reading.

Note that Eagle doesn't fill polygons unless you 1) enable this in the options and 2) perform a ratsnest. Once the polygon has been filled, ripping up (or deleting) a border of a filled polygon will first remove the filling. Moving the outline wires will not move the filling (new ratsnest required)

@Jens-Michael Gross - Thank you so much for your response and help! I truly do appreciate it.

Out of curiosity, would I create the capacitive sensor array as both a symbol and package using the polygon fill method? The only reason I ask is because the example I have seen through Texas Instruments threads appears to use a wire command as the symbol.

Also, what would the rats nest achieve when designing a capacitive touch sensor array?

I will begin to redesign my capacitive sensor array using the polygon fill method and will update you with any questions I may have

Kyle Hunter said:

would I create the capacitive sensor array as both a symbol and package using the polygon fill method?

Neither - nor. The problem is that you cannot give the polygon inside a package definition a signal/pin name. So when you place the package later, you'll get lots of DRC clearance errors. You cannot validly connect the polygon to the pad.

If you add the polygon manually to the board and place it over the pad of the package, you can assign it a net name and it will melt with the pad.

If you want round or elliptic pads, you can just define an SMD pad of the proper dimensions and set its roundness to 100. You'll get a round giant pad that can directly act as the sensor pad.

For other pad shapes, put an SMD pad in the middle, add a polygon of your choice to one of the other user-defined layers (e.g. 59/60 which auto-flip when you mirror the package) and tell the PCB manufacturer to include these layers into the copper. You should also add the shape to the restrict layers. This combines the freedom of shape with the convenient use of library-predefined packages.

Or you manually draw the pad polygon into the board itself, one by one (you may ocf course use copy/paste) and give the polygon the name of the pads signal. Here you won't forget adding the layer to the copper. But it won't be as convenient as the library device.

Kyle Hunter said:

Also, what would the rats nest achieve when designing a capacitive touch sensor array?

Ratsnest usually reorders the unrouted signals, connecting the airwires to the nearest already routed trace of the same signal name. However, it removes th efill of polygons and calculates the fill anew. (if you move a polygon, only the outline moves, the fillign remains static until next ratsnest).
You can deactivate this filling funcitonality in the options. If so, then polygons are only shown as outline. However, this opsiton is stored into the board file, so if you disable 'ratsnest processes polygons', then the PCB manufacturer will make you boards with polygon outline only.

The handling of a sensor array depends on your signal/net definitions and is independent of polygons. However, if you don't specifiy restrict areas beneath the polygon, then the autorouter might try to route signals through the polygon, cutting it into pieces (and even remove orphaned parts that have no longer contact to the 'real' signal traces)

Unfortunately, I cannot check how TI does this. The TI libs require a newer version of Eagle than the one we have licensed.
This also means, maybe the newest Eagle versions offer a better way than our older one. if so, I have no idea how it is done.

Thank you very much for your response, I truly appreciate all of your help again!

Jens-Michael Gross said:

Neither - nor. The problem is that you cannot give the polygon inside a package definition a signal/pin name. So when you place the package later, you'll get lots of DRC clearance errors. You cannot validly connect the polygon to the pad.

If you add the polygon manually to the board and place it over the pad of the package, you can assign it a net name and it will melt with the pad.

If you want round or elliptic pads, you can just define an SMD pad of the proper dimensions and set its roundness to 100. You'll get a round giant pad that can directly act as the sensor pad.

For other pad shapes, put an SMD pad in the middle, add a polygon of your choice to one of the other user-defined layers (e.g. 59/60 which auto-flip when you mirror the package) and tell the PCB manufacturer to include these layers into the copper. You should also add the shape to the restrict layers. This combines the freedom of shape with the convenient use of library-predefined packages.

Or you manually draw the pad polygon into the board itself, one by one (you may ocf course use copy/paste) and give the polygon the name of the pads signal. Here you won't forget adding the layer to the copper. But it won't be as convenient as the library device.

So your suggestion is to manually create the polygon filled sensor array in my schematic, rather than creating a separate library (package and symbol) for the polygon filled sensor array? I have noticed when I create a polygon design in my schematic that I am not able to designate the rows as the bottom layer and the columns as the top layer. If this is what you suggest, do you know of a way to designate the top and bottom layers? Maybe I am not fully comprehending your solution.

Kyle Hunter said:

So your suggestion is to manually create the polygon filled sensor array in my schematic, rather than creating a separate library (package and symbol) for the polygon filled sensor array?

This is the simplest way, even though not the cmost conbenient when you use them in many projects.

Kyle Hunter said:

I have noticed when I create a polygon design in my schematic that I am not able to designate the rows as the bottom layer and the columns as the top layer.

You directly draw the polygons in the board, into top or bottom layer.
You use a one-pad (SMD) device as element for the schematics and add it to the signal. THen you place the pad in the middle (or so) of teh final pad position and draw the polygon around, then you give the polygon the same name as the signal the pad is connected to. When the polygon is filled, it will melt seamless with the SMD pad. You should switch glue and such off for the pad in the library package, so it appears as plain copper without hole in the cover etc.