SMCLK divider accuracy

There is no fractional clock divider on msp430, so clock divider by 2 shall work as expected - giving perfect by 2, division.

Perhaps you have other kind of problem - like clock input is not correct (you shall check and tell  clock 0 and 1 voltages, duty cycle) , , maybe you think you measure SMCLK/2 but you don't. It's hard to tell at the moment. Try to look at clock signals using scope.

What you are getting when you don't divide but output SMCLK to "SMCLK" pin?

the scope tells me that the frequency at XT2IN is 2.049MHz (that's good). When i measure it at the SMCLK-pin without a divider it clocks at 2.347MHz.  

Both signal go from 0V to 3.32V.

Duty cycle is 100% at XT2 and 80.7% at SMCLK-pin.

Route clock undivided to "SMCLK out" pin and scheck - is it same signal coming into XT2IN?

No, it's not the same signal. XT2IN = 2.049MHz ; SMCLK_OUT = 2.347MHz

Perhaps it's DCO or something you are getting on SMCLK_out. How do you configure clocks?

David_ said:

When using a SMCLK-divider of 2, the resulting frequency (when measured at external pin) is 1.176MHz.

David_ said:

SMCLK_OUT = 2.347MHz

Indeed you have clock source, not divider problem

	P7SEL |= BIT0;
	P5SEL |= BIT5;
	UCSCTL6 |= XT2BYPASS;
	UCSCTL6 |= XT1BYPASS;
	UCSCTL6 &= ~XT1OFF;
	UCSCTL6 &= ~XT2OFF;

        do
	  {
	  UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + XT1HFOFFG + DCOFFG); 

	  SFRIFG1 &= ~OFIFG;                      
	}while (SFRIFG1&OFIFG);              

	UCSCTL4 |= SELM__XT1CLK;// + DIVS0 + DIVM0;				
	UCSCTL5 |= DIVM__1;		//MCLK Divider = 1
	UCSCTL4 |= SELS__XT2CLK;
	UCSCTL5 |= DIVS__2;	// set SMCLK Divider = 2

thats my clock init code.
So far I don't use the DCO, but get the MCLK from an external 25MHz oscillator

Well if you are sure that MCLK is running from external 25MHz then try sourcing SMCLK/8 from same 25MHz source and see - are you getting SMCLK/8 on SMCLK_out or not. You shall somehow narrow your search

Thanks alot for the help from both of you!!

In the end, you we're right, I got the signal from the DCO and not XT2IN, which was unfortunately almost the same frequency...

David_ said:

the scope tells me that the frequency at XT2IN is 2.049MHz (that's good). When i measure it at the SMCLK-pin without a divider it clocks at 2.347MHz.  

However, if you apply a scope to a non-digital source, it may influence the reading (on a digital source too, but since it is digital, the result will be on or off)
Attaching a scope probe to a crystal pin will apply a quite large capacitance to this pin which will influence the frequency.

It is possible that without scope, XTin is 2.347MHz but when you touch it with a scope, you drain it to 2.049 MHz. And when you remove the probe to measure SMCLK output, you see the 2.347MHz.

I know that the above frequencies are rather unlikely (And in case of a crystal,  a 2.048MHz crystal shouldn't give 2.347MHz and just coincidentally be 2.047 if loaded), but things liek this should be considered when checking strange phenomenons.

David_ said:

Duty cycle is 100% at XT2 and 80.7% at SMCLK-pin.

So I guess you meant 50% DC and 40% DC.