MSP430F6730: Sigma Delta Conversion of MSP430F6730

Part Number: MSP430F6730

1. I want three indepnednt measurment with maximum accracy and precison

2. I want sampling frequency at 3.2KSPS i.e 64 sample per cycle of 20ms

3. The input signal range is +-0.9 Volt

Question

1.What should be OSR and clock frequnecy to achive maximum accuracy.

2. What are other specification i should be serious from accruacy and precision point of view

3. After every samples i want to do mathematical computation which will require about 0.2 msec. So what will be the converson time from start of trigger to getting result.

4. should I use in contnous mode or signle shot . As my process is continous.

Conversion time is equivalent to the number of modulator clock (fM) cycles as determined by the OSR value. An OSR of 1024 and fM of 1 MHz results in about 1 ms conversion time after a trigger or 1k samples per second. To get 3.5k samples per second you will need to decrease your OSR to about 290 or smaller (default 256 is recommended). You could also increase fM but only to a maximum value of 2.3 MHz. A high OSR achieves maximum accuracy but slowest conversion rates, you will need to find a compromise between the two. You would reset the SD24SNGL bit in order to convert continuously, it will continue operation until the SD24SC bit is cleared by software. Section 29.2.9 of the User's Guide can be resourced for answering most of your questions.

Regards,
Ryan

It shall be noted that filter depth of most delta-sigma ADCs including SD24, is longer than decimation/oversampling rate. In single conversion mode SD24 gives correct output value of full-swing input voltage step only after 3rd or even 4th conversion, so it is good idea to run SD ADC continuously and obviously know your ADC slew rate limitations when sampling AC signals. More about it in slau208, chapter " 29.2.7.1 SINC3 Filter". Reading slyt423 and slyt438 will not hurt either.

1. For OSR 512 and sampling frequency 2.3 MHZ what is the maximum  reslution is ENOB i can achive

2. With OSR 512 and Frequnecy 2.3 Mhz , how can I do 64 point FFT because we will be getting 90 samples in a cycle (i.e 20 msec).

3. By keeping continuous mode I have to read every samples so when will i do mathematical computation.

4. If I use signle shot then i have drop first two samples, then in that case i wont get exact signal input for the FFT computaion.

5. I have already refered the document indicated by you but still i am not clear.

ENOB = (SINAD-1.76)/6.02 = (87-1.76)/6.02 = 14

You'll have to figure out how to do the FFT math in the allotted time.

Regards,
Ryan

Ashutosh Pailwan1 said:

3. By keeping continuous mode I have to read every samples so when will i do mathematical computation.

- While ISR is not fetching data out of ADC. At 3.5 ksps you have plenty of 25MHz CPU time to do something else besides reading ADC samples.

Ashutosh Pailwan1 said:

4. If I use signle shot then i have drop first two samples, then in that case i wont get exact signal input for the FFT computaion.

For comparably fast (to DC max ADC sample rate:))) AC signal you need continuous sampling which obviously is not single shot mode :) It is already said here in this thread.

In case you are not familiar with interrupt service routines which "run" in parallel to other CPU task(s), it is time to learn them now.