MSP430F5239: RSTDVCC/SBWTDIO sensitivity

Hi Bernd,
of course the signals on the mentioned communication lines for Spy-Bi-Wire are critical for the debug and programming activities. The question would be, where do the signal integrity issues come from. This can of course have various root causes.
1. The capacitive load for the communication line is e.g. critical. Not only in terms of the value itself, but also in terms of the balance between TEST and RST. If the difference between the two is too large the timings are critically affected.
2. There might be disturbances in the application, which corrupt the signal integrity. These can result from application activities, or come from the outside. Thus e.g. also the length of the connection between the tool and the device in the application is critical. The different debug and programming tools for MSP430 support different maximum connection lengths.
3. When debugging in-circuit, also the sensing of the supply voltage of the device application is critical, as errors in the supply level detection would result in application of wrong signal levels.
4. The supply of the application as such also might be critical. E.g. if the target would be supplied by the debug tool, it might be at some point at the limit, either due to current peaks of the application, or too high current consumption in general.

So please let us know more details on the setup, then we can be more specific and go into more details. Many thanks in advance.

Best regards
Peter