Other Parts Discussed in Thread: TPS3839, TPS22860
What are the specifications for “DVCC rise time” for MSP430FR2433?
Many other family members have this specified (say a max and a min) in the data sheet, typically under “Power Supply Sequencing.” A search on “rise” in the data sheet “SLASE59D – OCTOBER 2015 – REVISED SEPTEMBER 2018” shows no apropos result.
Also, a footnote (1) to Table 5-2 in the same document says “A safe BOR can be correctly generated only if DVCC drops below this voltage before it rises” referring to Vbor,safe == 0.1V. I interpret this to mean only that a particular kind of reset (the BOR reset) will occur safely only if DVCC drops to that level. I assume that means that another kind of reset will occur (SVS reset) if DVCC drops below Vsvsh- but not below Vbor,safe of 0.1V. I don’t interpret that to mean that the chip might never come out of reset.
The context is a solar cell to super capacitor power supply, which can be very slow rising and falling. Currently I have designed in an external voltage monitor (TPS3839) and a load switch (TPS22860) to switch power to the MSP430FR2433. I am wondering whether I can eliminate those parts. Also, since TPS22860 does not have QOD quick output discharge, this design does not take DVCC below 0.1V when DVCC to the MSP430 is switched off. My one crude test shows that the MSP430FR2433 will start, brownout, and reset without those extra parts. But unless TI will specify the behavior, I will need to do extensive testing.