Hi,
The DMA9 errata of EXP430FR5739 has the following workaround:
2) When using DMA channel 0 for transferring data to and from the eUSCI_A or
eUSCI_B, use DMA channel 2 (lower priority than DMA channel 0) to read the same
register of the eUSCI_A or eUSCI_B that DMA channel 0 is working with. Use the same
USCI IFG (e.g. UCA0RXIFG) as trigger source for these both DMA channels.
Can this workaround prevent completely unexpected behavior on DMA9 errata?
In other words, is it possible to miss the trigger on DMA channel 2?
Best regards,
Keigo Ishii