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DRV8912-Q1: tsc_spi

Part Number: DRV8912-Q1

Hello team,

Could you clarify the tsc_spi?

I found below e2e thread discussed this but still several items are unclear for us.

https://e2e.ti.com/support/motor-drivers-group/motor-drivers/f/motor-drivers-forum/994868/drv8912-q1-drv8912-spi-timing-tsc_spi---what-is-it/3693216?tisearch=e2e-sitesearch&keymatch=tsc_spi#3693216

According to above E2E thread, we should wait at least 2.5us between the SPI data frame.

1. Is below statement correct?
"In any case, we should insert at least 2.5us nSCS high between the SPI data frame as shown below the SPI communication is guaranteed?"

2. If we insert at least 2.5us nSCS high, the SPI communication is guaranteed?  

    The tsc_spi only shows typical value, so I would like to know.

3. What is the tHI_nSCS for?

Thank you.

Regards,

Hirata