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DRV8323R: Where DVDD is used in DRV8323RSRG internal logic.

Part Number: DRV8323R

Hi, Ti Team

We use DRV8323RS Gate Driver.

1. I would like a detailed internal block diagram of where DVDD is used.(Please be sure to reply.)

2. When decoupling capacitor is not installed on the DVDD pin:

   a) Offset (1.65v) of the bi-directional current sensor sometimes does disappear.

   b) When the power is turned on, if an unwanted offset value is output to the current sensor output signal, it continues to be output until the power is turned off.

   c) Does the current sense setting change depending on whether the DVDD decoupling capacitor is installed or not?
      (Defalut Bidirection -> Power On, Unidirection)

*Please provide detailed answers to all questions.

  • Hey Kim,

    The DVDD is supplied from the VM and provides a 3.3V output with 30mA current capability. The voltage on DVDD can fall if greater than 30mA is sourced from DVDD.

    We recommend having the 1uF capacitor on DVDD to adjacent AGND pin to stabilize the voltage and to reduce the impacts on transient causing it to fluctuate.

       a) Offset (1.65v) of the bi-directional current sensor sometimes does not appear.

    A) Is the device awake? Proper voltage on VM and DVDD? I would like to know under what conditions it is outputting 1.65V vs when it is not.

       b) When the power is turned on, if an unwanted offset value is output to the current sensor output signal, it continues to be output until the power is turned off.

    A) Please measure the voltage being used for VREF when this is occurring since that is the supply for CSA output.

       c) Does the current sense setting change depending on whether the DVDD decoupling capacitor is installed or not?
          (Defalut Bidirection -> Power On, Unidirection)

    A) Please install the cap as per above recommendation. I am suspecting if the voltage on DVDD is fluctuating.  Is DVDD connected to VREF?

    Best,
    Akshay

  • Thank you for the reply.

    A) Is the device awake? Proper voltage on VM and DVDD? I would like to know under what conditions it is outputting 1.65V vs when it is not.

    > Yes, device is awake. 28V is input to the VM, and DVDD is not used. An external 3.3v power supply is connected to VREF. And 1.65V is not output sometimes per power cycle. At this time, the motor is not running(Current is 0A).

    A) Please measure the voltage being used for VREF when this is occurring since that is the supply for CSA output.

    > VREF is nomal(3.3V).

    A) Please install the cap as per above recommendation. I am suspecting if the voltage on DVDD is fluctuating.  Is DVDD connected to VREF?

    > An external 3.3v power supply is connected to VREF. These symptoms disappear when a decoupling capacitor is connected.
    I'd like to know the reason.

  • Additionally, if the DVDD voltage drops to 1V, can the DRV8323RS Register value change?

  • Hey Kim,

    DVDD is also the internal logic regulator voltage so we need the capacitance to ensure that it works properly. It is possible that SPI can get reset if internal logic(DVDD) falls below its threshold.

    I recommend adding the capacitance and then measuring VM, DVDD, SOx and Vref to ensure correct behavior.

    Best,
    Akshay

  • Hi Akshay,

    You may be curious why we keep asking a possible malfunction in the case where the DVDD cap is not connected while it must be connected. The reason is we need to justify the DVDD cap is related to a malfunction in which the DRV seems to lose the offset(Vref/2) value at the bidirectional mode. When the offset(Vref/2) is lost, it causes a malfunction of our products and customer keeps challenging us to prove that the DVDD cap causes losing the offset. They believe if it can not be logically explained, restoring the DVDD Cap. may not be the solution, while we believe it is the solution.

     

    To clarify the question again,

    Q1) Does the unstable internal logic regulator(DVDD) affect such loss of offset(Vref/2) in the bidirectional mode? could be even by random?

    Q2) Is the offset circuit, in red circle below, controlled by also the DVDD? in other words, the unstable DVDD could change the bidirectional or unidirectional mode randomly? (since the Offset(Vref/2) circuit is controlled by the mode and internal register settings in a way.)

    Q3) Does the offset circuit detect and hold the Vref only once at the DRV startup of the bidirectional mode? or does it continuously measure and update the Vref to the end of the same power cycle? (We suspect it detects and holds the Vref only once at the DRV startup, since the proper offset(Vref/2) has never been restored in the same power cycle when the DVDD cap is missing, if it continuously reads and applies the Vref, the offset must have come back during the power cycle, even randomly.)

     

    I know this QnA is getting tedious for you, but we need your help to convince our customers with clear root cause and mitigations. All circumstances say the missing DVDD Cap, by our mistake, has caused such loss of the offset(Vref/2), but we haven’t been able to find logical explanations yet which could be only possibly given by you, TI. Thank you for your further support.

  • Hey Kim,

    I will look into this and aim to provide feedback next week.

    Best,
    Akshay

  • Hey Kim,

    The issue is that DVDD is the internal digital logic regulator, upon which the SPI, logic and CSA depends on. So, the DVDD voltage needs to be stabilized with the Capacitor as required by the Datasheet to even consider proper device functioning. The DRV logic needs to be properly powered for us to make assumptions about proper device functioning. The SPI might not be getting set properly/reseting if the DVDD logic is not properly sustained.

    Please ask the customer to add the capacitor since it is a required component and test to see if the issues are occurring.

    Best,

    Akshay