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DRV3205-Q1: About drv3205-q1 datasheet pp.1, pp.16

Part Number: DRV3205-Q1

I would like to know the meaning of the following part of the data sheet pp.1. I would like to know the outline of the following functions.

- Sophisticated Failure Detection and Handling Through SPI

System Supervision

- Q&A Watchdog

- I/O Supply Monitoring

- ADREF Monitoring

- Programmable Internal Fault Diagnostics

Programmable Dead Time

⇒Does this mean that the dead time of FET ON/OFF is controlled?

Please explain about pp.16.

Clock Monittaring

  • Nakamura-San,

    Yes we do have dead time monitoring, adjustable dead time, and dead time fault coverage.

    Regards,

    -Adam

  • Adam-san

    Thank you for your response.

    I would also like to have an overview of the following.

    - Sophisticated Failure Detection and Handling Through SPI

    System Supervision

    - Q&A Watchdog

    - I/O Supply Monitoring

    - ADREF Monitoring

    - Programmable Internal Fault Diagnostics

    Please explain about pp.16.

    Clock Monittaring

    Regards,

    Nakamura

  • Sorry. Supplement.

    ①About clock Monitoring

    Does clock Monitoring monitor the SPI communication clock? If not, what is the function?

    ②About Sophisticated Failure Detection and Handling Through SPI

    Where is the explanation of Sophisticated Failure Detection and Handling Through SPI in the data sheet? I checked, but could not find where it is written about Sophisticated Failure Detection and Handling Through SPI.

    ③About Programmable Internal Fault Diagnostics

    When you say programmable, do you mean that you can change the set value by manipulating the data in the registers of Table 1 Register Address Map? If so, which registers are accessed for example?

    ④About I/O Supply Monitoring and ADREF Monitoring

    What does the IC do when it detects abnormalities in the I/O supply and ADC reference voltage?

  • Nakamura-San,

    Adding these questions helps me guide the answers to you, so thank you for the context.

    1. Yes, clock monitoring checks for SPI clock faults during operation, more info in section 7.4.2.9.2 of the datasheet.
    2. Tables 6, 7, 8, and 9 in the datasheet discuss the fault handling and SPI.
    3. This description is mentioning the diagnostic features we include in the device, several diagnostics are possible using the diagnostic bits in the register map. All major functional blocks have diagnostics available so I can't list them all here but if you have specific questions on any of the diagnostics please let me know.
    4. Table 6 lists the Undervoltage and Overcvoltage coverage that we have on this device, please check there.

    Regards,

    -Adam

  • Adam-san

    Thank you for your response.

    Additional questions, please.

    1. What does the IC do when there is an error in SPI communication and clock signals?
    2. What does the IC do when the I/O power supply and ADREF become overvoltage and undervoltage?

    Regards,

    Nakamura

  • Nakamura-San,

    Table 6 lists the fault response of each fault, please check there.

    Regards,

    -Adam