Tool/software:
My customer is using DRV8906 and they found that the SPI communication can works well when read the data. But it failed when they want to write the data. could u kindly help to give some advice? Thanks!
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Tool/software:
My customer is using DRV8906 and they found that the SPI communication can works well when read the data. But it failed when they want to write the data. could u kindly help to give some advice? Thanks!
Hey Zoey,
Can you post a schematic zoomed in on a single SPI frame? I want to make sure the SPI format follows TI required format (typically called SPI MODE 1) with correct CPOL
Hi Jacob,
Thanks for your reply ~
U can neglect the first graph and see the second. the customer said that it can’t write but can read well.
Hi Jacob,
This is Eason from SEM team, I just have a call with customer and want to supply more information with you.
Let's me share with you per E-mail.
Thanks
Eason
Hello!
This is our two chips daisy-chained form of communication code and communication results, our purpose is to write 0xFF data into the register address 0x1f inside, the two pieces of writing after the result is 0x00
Hello,
What is the clock speed?
The clock speed could be too fast to write to the registers.
How many clock cycles occur?
A full 16 SCLK cycles must occur for transaction to be valid.
Be sure to review the SPI section in the datasheet for any MUST do's while using SPI communication.
DRV89xx-Q1 Automotive Multi-Channel Half-Bridge Drivers with Advanced Diagnostics datasheet (Rev. C)
Best,
David
1.SPI 时钟最大值为 4M,2M 和 1M 均已通过测试
2. When you say 16-bit SCLK, is it for one-to-one devices or Daisy chain is also necessary for this kind of communication?
3. Is the Daisy chain also 16 data communications? I tried 16-bit communication and couldn't get through.
4. I am now daisy-chaining the way. There is no Daisy chain communication code routine
Hello,
Yes, the clock signal should be the same whether daisy chaining or not.
See section 8.5.3.1 for more details on daisy chain communication.
DRV89xx-Q1 Automotive Multi-Channel Half-Bridge Drivers with Advanced Diagnostics datasheet (Rev. C)
Best,
David
Hello,
Can you confirm that chip select signal is high during communication. The image below is an example taken from the lab, while driving OUT4 with 100% duty cycle.
Best,
David