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DRV8711 SPI read problem

Other Parts Discussed in Thread: DRV8711

Hi,

I'm currently having problems reading from my DRV8711 chip. The writes seem to work fine since my application (which only needs to write to the driver) works as intended. I'm now trying to read the registers from the driver, but I can't seem to make it work as told by the datasheet.

I looked at the traffic on my SPI line between my microcontroller and the driver and it looks fine. First, I write 0x003 to the CRTL register (0x0003) and then I read from the same register (0x8000). According to the datasheet, the data should be outputed from the drive after the first byte (0x8) and I should read 0x003 from the line. Then, for the sake of testing, I write to the TORQUE register (0x11FF) and read from it (0x9000). I should then be able to read (0x1FF) from the line. I finish with a write to the CTRL register (0x0003).

However, the data on the line is nothing like I expected. I analyzed the data with a Saelae and here is a screenshot of what it looks like (MISO is data out from the master and MOSI is data in to the master) : 

The master clock is set at 500 kHz and on 16 bits/word transmission. The pin RESET is set at zero (0) at my initialization and the pin SLEEPn at one (1). Am I missing something? Here is a picture of what my initialization looks like : 

Thank you for your help and please let me know if you need more information.

Fred

  • Hi Fred,

    Are you using the launchpad? If so, please see the post e2e.ti.com/.../1503716

    If not, are you meeting the timing described in Figure 1 of the datasheet?
  • Hi Rick,

    Thank you for your answer. No, I am not using the launchpad. I will look at the timings tomorrow and be back shortly.

    Fred
  • Hi Rick,

    As I told you yesterday, I am not using the launchpad. I also compared my timings to those in the Figure 1 of the datasheet and I am fine. I only changed the parameter for my logic analyzer from "Data is valid on clock leading edge" to "Data is valid on clock trailing edge" to respect the Td(sdato) from the datasheet and the analyzer now seems to ignore the two high bits that occur during a read (as shown on the picture below).

    I looked at those bits on the oscilloscope and they do not seem to be logical ones (HIGH), the voltage is just a really slow slope that goes to 2.5V (instead of 3.3V). Below is a phone picture I took to illustrate what I mean. 

    YELLOW = CLK; BLUE = MASTER OUT; PINK = MASTER IN.

    I also added a delay of 1ms after setting the RESET pin to one (1) and another ms after setting the SLEEPn pin to zero (0) in my initialization. Do you have anymore ideas as to what I might be doing wrong or other things I should verify?

    Thank you for your help,

    Fred

  • Hi Fred,
    I may be mis-interpreting the scope capture, but it appears that there may be two issues.
    First please make sure the SDATI is changing on the falling edge and clocked on the rising edge.
    Second, what is the value of the pullup resistor on SDATO? It may be too small to raise the voltage to a logic high prior to clocking the data on the rising edge. The resistor value can be as low as Vpullup/.005.
    If possible, please slow down the SPI interface to confirm the timing.
  • Hi Rick,

    I'm sorry for the really long delay, but the issue was indeed that I was sampling the RX data at the middle of the clock instead of at the end. I had to add a flag to my open function and it was resolved.

    Thank you,

    Fred
  • Hi Fred,

    No worries. And thanks for posting the reason so others can benefit.
  • Hi Frederic,

    Want to confirm with you that the SDO should also be sampled at the rising edge of SPI CLK. So could you give more explain on "instead of the end" ?

    Best regards,
  • Well, my microcontroller only has the options of sampling the input data at the end or at the middle of a clock, and the middle option seemed to work.