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DRV8837 Output Enable time and Delay time over spec!

Other Parts Discussed in Thread: DRV8837

Dear Sir:

                  My customer have DRV8837 Output Enable time and Delay time over spec issue!

The DRV8837 spec page 7, Figure 2, the Number 7 (Output enable time) Max value is 300 ns,

and Number 10(Delay time, INx low to OUTx low) Max value is 160 ns, 

but customer measure result is 57.91us-61.67us,  we had check the Sleep pin,  Vcc pin and VM pin all pull high before IN1 and IN2, 

please refer attached file waveform,  is it correct or something wrong? Thanks a lot!DRV8837 Motor measure timing_1109.xlsx 

  • Hi Jothur,

    It appears there is some confusion about the spec. There are two specs involved in the timing provided; T7, Output enable time, and T9, Input to Output high.

    T7 is not noticeable because the outputs are at 0 when IN1 and IN2 transition from low to high. This T7 transition is not seen unless the outputs have some middle voltage on them.

    The point that should be measured has been highlighted on the second page of the updated file.

    To measure T7 and T8, it is suggested to create 2 voltage dividers between VM and GND using two 10k resistors. Place the midpoint of each voltage divider on the OUTx pins. When disabled, the OUTx pins should be ~VM/2. When enabled the outputs will be VM or GND.

    Updated DRV8837 Motor measure timing_1109.xlsx