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DRV8308: DRV8308 5V regulator issue

Part Number: DRV8308
Other Parts Discussed in Thread: STRIKE

For the second time during debugging it seems the DRV8308 5 Volts regulator burned out.

It seems it burns out at power up. The enable pin is pulled-up to VM with a 10K resistor and 5V zener to gnd.

At the 5 volts output there is a 0.1uF cap and a 10uF to supply the halls and microcontroller.

The Vsw output is not in use.

Total Vreg consumption is <20mA.

If I connect now the board to the power supply the current draw is only 3mA and there is no voltage even on Vint pin.

The VM pin has 2 10uF/35 ceramic capacitors.

Any clue?

Gian Paolo

  • Hello Gian,

    Reviewing sources of damage:

    In all those cases its clear that the DRV8308 is damaged and needs to be replaced. As you mentioned, VREG is generated internally and so there's very little reason for the VREG to be damaged without assembly, PCB layout design, or some external source of energy causing the problem. In other words, we test VREG functionality before the part is shipped so there's very little chance of a defective device. The capacitors are right, so no problem there. Before going to layout and assembly, let's talk about the ENABLE pin, which might be the external source of energy we're looking for.

    ENABLE pin data

    Not sure if you've ran simulations or taken waveforms on the ENABLE pin, because VM will ramp up to >>5V and the diode will need to start clamping fast enough to not exceed the 5.75V abs. max on the pin over temperature or different VM slew rates (or spikes!). Because the ENABLE pin circuitry is referenced to VREG there's a path for current to flow through and damage the VREG pin. I'm not sure how consistent you get the damage when turning on the supply but I'd be curious if you lowered VM to see if the damage is less likely to occur. Also capturing waveforms to understand how much margin you have would help as well.

    Root cause recommendations:

    If this turns out to be the root cause, I want you to weigh the options for rework or replacing the circuit. The problem is that you need some stable supply to turn on ENABLE, that can come from the MCU, a diode, a voltage divider, a voltage regulator, etc. If this shows the diode doesn't work, you have a lot of other options to check. In my opinion, the MCU is the most flexible way, the voltage divider and diode are the cheapest ways, and regulator is the most robust way. There are pro's and con's to each approach. So if you can't tell me why you chose a diode instead of the other options, you should definitely investigate them more thoroughly.

    Specifically, the MCU approach is my recommendation. We must tie the ENABLE pin to the MCU though a GPIO and tie the power of the MCU to a buck regulator sourced from VM instead of VREG. So you add a buck (with increases cost) but now the MCU can operate without enabling the DRV8308 (which increases flexibility). 

    Best,

    -Cole

  • Thank you for your answer.

    Unfortunately the use of an external buck converter is not an option since the board space is very limited.

    The board is a 4-layer pcb with a proper ground plane and at a first glance there should not be a layout issue.

    I don't understand your statement: "the ENABLE pin circuitry is referenced to VREG", what do you mean?

    Adding a 100nF capacitor in parallel with the zener diode would reduce enough the dV/dT to solve the problem, in your opinion?

    Should I also put a diode from Vreg to VM (cathode to VM) to make sure the damage is not created when board is powered-off

    no matter of the little capacitance (10uF) on Vreg?

    The thing is I thought the Vreg was meant exactly to power-up a uController and reduce the overall component count......

    Regards

    Gian Paolo

  • Hello Gian Paolo,

    Let me give you a proper answer tomorrow. Just note that this week is a US holiday so expect some delays in all E2E responses.

    For now, I'll only expand on my "ENABLE pin circuitry is referenced to VREG" comment. Essentially, the device needs logical rails to power the comparators or FETs inside the device that will sense that the ENABLE voltage has passed the input logic high voltage spec on the ENABLE pin. Sometimes, ESD diodes are connected within the device that divert current away from the circuitry to either prevent damage that an ESD strike could cause. Any of these paths becoming higher than the 5V of VREG means current will try to from from ENABLE to VREG, as ENABLE will have a higher voltage than the VREG that supplies the internal circuitry (sometimes damaging these paths within the part as a result).

    Best,

    -Cole

  • Hello Gian Paolo,

    Adding a 100nF capacitor in parallel with the zener diode

    It could, but you'll have to do a side by side comparison of the waveform to see if the voltage on the ENABLE pin is the root cause, and seeing if adding the capacitor helps. More on that later.

    Diode Vreg to VM for power off

    The VREG is already rated for -0.3V to 5.5V so I'm not sure what what diode protects against during the power off case. We don't expect or want the VREG rail to raise and if we expect the energy is traveling through the ENABLE pin to VREG then it makes more sense to protect on the ENABLE as it is the source of the problems.

    (10uF) on Vreg

    The VREG pin was design and tested with 100nF and anything larger will result in instability and unknown problems. So its not recommended to increase the value.

    Vreg was meant exactly to power-up a uController

    Please don't misunderstand that VREG does provide the benefit of powering external circuitry like an MCU.  This is why "the problem is that you need some stable supply to turn on ENABLE". This is regardless if VREG powers an MCU or if a external voltage regulator powers an MCU. In my recommendation, the MCU (and by extension, the external voltage regulator) provides the stable supply for ENABLE. In your current case, which we have assumed is not working, the stable supply should come from VM and the diode.

    Perhaps you can consider the minimum and maximum supply voltage of VM and make a voltage divider connected to the ENABLE pin from VM, in combination with the 5V zener (and maybe capacitor) to suppress voltage transients from VM (which would be around 5V after the divider instead of 10s of Volts in the current design).

    Again, all of this can be done after we verify that spikes on ENABLE is the root cause. 

    Best,

    -Cole