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DRV8343-Q1: The Idrive setting facor with MOSFET

Part Number: DRV8343-Q1

Hi

I'm a little confused about the Idrive setting. Below is what the spec for DRV8343S says.

For MOSFETs with a known gate-to-drain charge Qgd, desired rise time (tr), and a desired fall time (tf).  IDRIVEP >Qgd * tr

However,It seems that the MOS will charge Qgs first than Qgd. Is the VGS rise time possible to concern the Qgs+Qgs, not just Qgd?

Btw, for Qg restriction:
Trapezoidal 120° Commutation: IVCP > Qg × ƒPWM
Sinusoidal 180° Commutation:  IVCP > 3 × Qg × ƒPWM

Is it a slip of pen?It can be multiplied by 2?

Trapezoidal 120° Commutation: IVCP > 2 × Qg × ƒPWM ( for 2 MOS turn on the same time)
Sinusoidal 180° Commutation:   IVCP > 6 × Qg × ƒPWM  (for 6 MOS turn on one duty cycle)

and the Qg is for Gate charge total?

Regards

Arrow