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TPS54225: Short Circuit Behavior

Allan Fan
Expert 6000 points
Part Number: TPS54225

Hi expert,

Customer did TPS54225 short circuit test by push "short" on e-load and it's always SHORT. The ENABLE is controlled by CPLD. Once Vo drop, CPLD will disable ENABLE and then ENABLE again.

One thing from below waveform we can't understand is  after short circuit, trip UVP and it lasts about 286uS then converter start switching again(seems in OCP status) even ENABLE is not yet > 2Vh. 

After ~800uS, ENABLE > 2V, it stop switching and latched. It can be only recovery by toggling ENABLE.

Our questions are

1. why tps54225 would operate even ENABLE < 2V? 

2. UVP should be latch protection after UV 250us. Why it's not latched? 

Ch1: 3.3Vo

Ch2: Iinductor

Ch3:Vsw

Ch4: EN

Ch1: 3.3Vo

Ch2: Iinductor

Ch3:Iout

Ch4: EN

Regards,

Allan

  • 0
    TI__Mastermind 23576 points

    Hello Allan,

    I am looking at your question. I will get back to you as soon as possible.

    Regards,

    Jose

  • 0
    TI__Mastermind 23576 points

    Hello Allan,

    1. why tps54225 would operate even ENABLE < 2V? 

    This device does not have a precise EN control. The IC is guaranteed to be turned off only below 0.4V (check electrical characteristics). Above that and below the EN hi level threshold (2V), the state is not known.

    Undervoltage lock out protection (UVLO) monitors the voltage of the VREG5 pin. When the VREG5 voltage is lower than UVLO threshold voltage, the TPS54225 is shut off. This is protection is non-latching.

    2. UVP should be latch protection after UV 250us. Why it's not latched? 

    The TPS54225 detects over and undervoltage conditions by monitoring the feedback voltage (VFB). This function is enabled after approximately 1.7 times the soft-start time. When the feedback voltage becomes higher than 120% of the target voltage, the OVP comparator output goes high and the circuit latches the high-side MOSFET driver turns off and the low-side MOSFET turns on. When the feedback voltage becomes lower than 70% of the target voltage, the UVP comparator output goes high and an internal UVP delay counter begins. After 250 μs, the device latches off both internal top and bottom MOSFET.

    Design Recommendations:
    It is recommended to used a pull-up resistor from 20k - 150k Ohms at PG pin.

    Regards,

    Jose