This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

UCC27322-EP: Does output peak current change at lower VDD?

Part Number: UCC27322-EP

Hello, got a couple questions regarding this device:

1) Datasheet peak 9A output states test condition Vdd=14V and app note section states 15V. If the device is operated only at 5V will peak source/sink current change? 

2) Can you share output BJT Vce data for varying output current? We have an application where we're seeing the output about 0.8V below the rail (when high). Output source current is < 100mA so we weren't expecting this much Vdrop. 

Thanks. 

  • Hello Francisco,

    If you look at figures 6 and 7 in the datasheet, you can see that the rising time driving a capacitive load increases at low VDD and the falling time stays fairly consistent. For the fall time driving a capacitor at low VDD to stay consistent it means that the drive current varied with VDD to result in the same falling edge of a lower delta V.

    The source current does reduce as the drive output approaches VDD especially at lower Vdd as shown in Figure 6. The pull up current closer to the VDD rail is provided by the parallel FET drive and the BJT current contribution is less approaching VDD saturation.

    Regards,