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TPS51285B: The OC limit is different with different temperatures

Part Number: TPS51285B

7587.Tps51285_Design_support_sheet_r0.2.xlsxTPS51285B线路图.pdfPK630.pdfs457-10s1-211207.rar

Hi team, my customer meet some qustion:

At present, when the client encounters VCC5A at low temperature, it is easy to OCP protection and not boot. The customer actually tested the OCP of VCC5A at room temperature is 19A, and the OCP of VCC5A at low temperature is -15°C is 11A.

The attachments are related schematic diagrams and layout diagrams, as well as MOS tube specifications and parameter calculation tables. Please help analyze what else causes the low OCP of VCC5A at low temperatures, thank you



  •  

    The Current Limit programming current of the TPS51285B controller has a 4500ppm/ºC temperature coefficient and a temperature dependent zero current offset voltage, both of which can contribute to the dropping current limit at cold temperatures.  In addition forced airflow associated with maintaining a cold temperature in a thermal chamber can result in greater temperature difference between the controller IC and the MOSFET, resulting in greater self-heating of the FET and mismatch between the temperature compensated current limit programming current, and the Rdson of the MOSEFT.

    The 4500ppm/ºC temperature coefficient appears to be larger than the cold temperature Rdson temperature coefficient of the MOSEFT.  That temp-co mismatch results in a current limit that is lower at cold temperature and higher at hot-temperature.

    The temperature mismatch between the MOFET die temperature, setting the Rdson and the IC die temperature setting the current limit programming is often greater at cold temperature than an room temperature, this also results in a lower current limit measured at cold than at room temperature.

    Finally, the zero current detect offset threshold of the current limit sense circuitry can have some temperature drift, resulting in current limits that vary over temperature.

    Typically, for a controller based design using external MOSFETs for current limit, it is advisable to account for a 20% rise in Rdson due to self-heating of the MOSET above the controller die temperature and use the worst case (most negative) offset voltage of -10mV.