Other Parts Discussed in Thread: TPS7H1101-SP
Hello,
Can I get confirmation that the provided SPICE model in the Design Tools section works? I've downloaded the TPS7H1101A-SP PSPICE model and imported it both into SIMetrix and LTSpice and am receiving the following errors:
Circuit: * C:\Users\---------\Desktop\Draft2.asc
Questionable use of curly braces in "b§e_abmgate yint 0 v={if(v(a)>{{vthresh}}|v(b)>{{vthresh}},{{vdd}},{{vss}})}"
Error: undefined symbol in: "if([v](a)>((vthresh))|v(b)>((vthresh)),((vdd)),((vss)))"
Questionable use of curly braces in "b§e_abmgate yint 0 v={if(v(a)>{{vthresh}}&v(b)>{{vthresh}},{{vdd}},{{vss}})}"
Error: undefined symbol in: "if([v](a)>((vthresh))&v(b)>((vthresh)),((vdd)),((vss)))"
Questionable use of curly braces in "b§e_abmgate yint 0 v={if(v(a)>{{vthresh}}&v(b)>{{vthresh}},{{vdd}},{{vss}})}"
Error: undefined symbol in: "if([v](a)>((vthresh))&v(b)>((vthresh)),((vdd)),((vss)))"
Questionable use of curly braces in "b§e_abmgate yint 0 v={if(v(a)>{{vthresh}}|v(b)>{{vthresh}},{{vdd}},{{vss}})}"
Error: undefined symbol in: "if([v](a)>((vthresh))|v(b)>((vthresh)),((vdd)),((vss)))"
Questionable use of curly braces in "b§e_abmgate yint 0 v={if(v(a)>{{vthresh}}&v(b)>{{vthresh}},{{vdd}},{{vss}})}"
Error: undefined symbol in: "if([v](a)>((vthresh))&v(b)>((vthresh)),((vdd)),((vss)))"
Questionable use of curly braces in "b§e_abmgate yint 0 v={if(v(a)>{{vthresh}}&v(b)>{{vthresh}},{{vdd}},{{vss}})}"
Error: undefined symbol in: "if([v](a)>((vthresh))&v(b)>((vthresh)),((vdd)),((vss)))"
Questionable use of curly braces in "b§e_abmgate yint 0 v={if(v(a)>{{vthresh}},{{vss}},{{vdd}})}"
Error: undefined symbol in: "if([v](a)>((vthresh)),((vss)),((vdd)))"
Error on line 245 : .model nmos01 nmos vto = 0.5 kpâ = 0.1 lambda =0
* Unrecognized parameter "kpâ " -- ignored
Error on line 65 : .model u1:c_u253_c288 cap c=1 dev=15%
* Unrecognized parameter "dev" -- ignored
Warning: Pd = 0 is less than W.
Warning: Ps = 0 is less than W.
Direct Newton iteration for .op point succeeded.
Ignoring empty pin current: Ix(u1:vin_1)
Ignoring empty pin current: Ix(u1:vin_2)
Ignoring empty pin current: Ix(u1:vin_3)
Ignoring empty pin current: Ix(u1:en)
Ignoring empty pin current: Ix(u1:vout_1)
Ignoring empty pin current: Ix(u1:vout_2)
Ignoring empty pin current: Ix(u1:vout_3)
Ignoring empty pin current: Ix(u1:vin_1)
Ignoring empty pin current: Ix(u1:vin_2)
Ignoring empty pin current: Ix(u1:vin_3)
Ignoring empty pin current: Ix(u1:en)
Ignoring empty pin current: Ix(u1:vout_1)
Ignoring empty pin current: Ix(u1:vout_2)
Ignoring empty pin current: Ix(u1:vout_3)
Date: Tue Mar 01 02:54:53 2022
Total elapsed time: 0.286 seconds.
tnom = 27
temp = 27
method = modified trap
totiter = 5151
traniter = 5139
tranpoints = 1888
accept = 1679
rejected = 209
matrix size = 208
fillins = 176
solver = Normal
Thread vector: 23.7/12.2[4] 6.5/3.8[4] 8.5/4.1[4] 0.8/1.7[1] 2592/500
Matrix Compiler1: 12.07 KB object code size 5.1/3.6/[1.1]
Matrix Compiler2: 16.23 KB object code size 1.9/5.2/[1.7]
I am unable to use the PSPICE for TI software for this design, would like to get this working in SIMetrix ideally. Thanks!
