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TPS1HB08-Q1: questions about current limit

Part Number: TPS1HB08-Q1

Hi Expert,

Lately I am reading Adjustable Current Limit of Smart Power Switches (Rev. B) and I have several questions.

  1. the app note mention that there are several current mirror architecture in TI high side switches. But it only shows one solution in the app note. May you help share other current mirror architecture? Thanks.

For the current mirror architecture, I also have some question. In the app note, it describe as below, "The closed loop amplifier OPSNS regulates the current at the CL pin so that the inverting and the non inverting inputs have the same voltage." It seems strange to me that e current at the CL pin is constant, it equals VCL(th)/RCL. Why it can be regulated? 

From my understanding, OPsns outputs low when normal working and output high when overcurrent happens. Is it correct? And The voltage on OPsns "+" and "-" pins are not equal, right? Actually if you can detailed explain how OPsns works to limit the current, that will be perfect. Thanks.

BR,

Elec Cheng

  • Hi Elec,

    The first regulation is from this op-amp below. The op-amp here will output gate voltage for MN1 so the CL pin always have the voltage of VCL(TH).

    The actual current limit is from the second op-amp OPSNS. OPSNS will output voltage to the MOSFET gate (the strength of the pull-down is regulated by this op-amp) so that the sensed current from the current mirror will match the pre-set current limit either internally or by the user.

    Please let me know if you have further questions.

    Regards,

    Yichi