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UCC28780EVM-002: Duty Cycle

Part Number: UCC28780EVM-002
Other Parts Discussed in Thread: UCC28780

Hi,

Good Day. The customer is currently running tests and evaluating the board UCC28780EVM-002.

He is looking to change the duty cycle on the PWML and the PWMH on the controller itself, these would be pins 2 and 3.

Do you have any knowledge as to where he would start to figure this out?

Please advise. Thank you very much.

Best Regards,

Ray Vincent

  • Hello Ray, 

    Thank you for your interest in the UCC28780 ACF controller. 

    The active-clamp flyback topology control is much more complex than simple pulse-width modulation (PWM) and controlling the ACF pulse width is an indirect process. 
    For the UCC28780 controller, duty cycle is actually set by controlling the peak primary current (peak current-mode control) to an internal current-sense threshold voltage (Vcst).
    So, despite its name, the PWML signal is set high at the beginning of a switching cycle and stay high until the voltage at the CS input exceeds the internal threshold.   
    The Vcst itself is modulated by the current pulled out of the FB pin, based on the device's Control Law (see page 23 of the UCC28780 data sheet).

    The PWMH signal, which drives the active-clamp transistor, is also indirectly modulated based in part on the demagnetization time (determined by the peak primary current, the output voltage, and the turns ratio) and in part by any additional time needed to generate negative magnetizing current based on the input voltage (see page 21 of the UCC28780 data sheet).  It is not possible to manipulate this signal on the EVM independently from the PWML signal.

    It may be possible to construct an open-loop test circuit where various UCC28780 inputs may be manipulated in complex ways to force desired duty cycles at PWML and PWMH, but the design of such a test circuit is beyond the scope of this forum.  

    Regards,
    Ulrich