TPS389006-Q1: FuSa questions about TPS389006-Q1 considering J784S4 PDN-3A

Hi Xiaowei,

I'm going to check with the design engineer.

Thanks,
Andrew

Hi Xiaowei,

Unfortunately, the only way to test NIRQ functionality/failure is by having the pin pulled low by writing into the FORCE_NIRQ bit. Most likely, I wouldn't recommend setting up your system to shut off if IRQ is pulled low.

Do you have a schematic/block diagram you can send? Or could you at least show what you are hooking the NIRQ pin to?

Thanks,

Andrew

hi Andrew,

Thanks for your help.

The current system design is follows, and it is from TDA4VH’s PDN design.

in this case(https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/1191494/tps6594-q1-fusa-questions-about-tps6594133a-tps389006-q1-for-j784s4-pdn-3a/4510683#4510683), the following info is provided.

“

On falling edge of MCU_PWR_GRP_IRQn ( connected to GPIO10), the PMIC will execute an Orderly Shutdown of all the rails.

On falling edge of MAIN_PWRGRP_IRQn ( connected to GPIO8), the PMIC will shut down the rails which power the SOC, but leave the rails associated with powering the MCU enabled. (and our system will be shutoff)

”

BR

xiaowei

Hi Xiaowei,

I see. Does your system have anyway to test NIRQ during the  power up sequence of TPS6594-Q1?

Thanks,

Andrew

hi Andrew,

Thanks for your reply.

Based on current system design, we can't test NIRQ during power up sequence of TPS65941-Q1, because of the sw/ autosar have not bring up in this phase.

Maybe add a delay in TPS6594-Q1 can be considered?

BR

xiaowei

hi Andrew,

Thanks for your reply.

We can't add delay in TPS6594-Q1, these logic shall be configured by TI.

Could you pls help to see how to implement 'test NIRQ path bwtween TPS389006 and TPS6594-Q1'?

BR

xiaowei

Hi Xw,

I'm not sure how you add the ability to check NIRQ functionality with some sort of buffer system that doesn't add a single point of failure to your circuit. Could you check in the other E2E thread if there's a way to disable GPIO8/GPIO10's functionality temporarily.

Alternatively, could you check in the other thread if there's a different GPIO that you can connect NIRQ to that can send a signal to GPIO8/GPIO10, but only after you finished testing NIRQ's functionality?

https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/1191494/tps6594-q1-fusa-questions-about-tps6594133a-tps389006-q1-for-j784s4-pdn-3a/4510683#4510683

Thanks,

Andrew

hi Andrew,

Thanks for your reply.

That thread is not related to ‘how to test NIRQ functionality between TPS6594 and TPS389006'.

Could you please help me to see who can be contacted to deal with systemic problems?

BR

xiaowei

Hi Xiaowei,

We are looking into this and will advise feedback by end of day tomorrow. Appreciate the patience here!

Thanks,

Isa