TPS650830: TPS650930 not generating RSMRST_PWRGD#

attaching the missing Schematic PDF file

TI_PMIC_Comparator.pdf

Hi Ravi,

  I can't see RSMRST_PWRGD# signal in your schematic.

  From the block diagram below, the comparator-C(VSC & ENC) output needs to be high even it's not used. 

Thanks!

Phil

Hi Phil,

Thanks for the quick reply.

in our board currently we are grounding the comparator-C(VSC & ENC) pins and we have no access to tie these pins to high.

Can you please suggest any other method to get the RSMRST# (signal name in SCH).

Please write back your thought on this.

Attaching the full PMIC Schematic PDF./cfs-file/__key/communityserver-discussions-components-files/196/TPS650930_5F00_PMIC_5F00_SCH.pdf

Thanks and regards,

Ravi babu

Hi Ravi,

  Datasheet has the section (copied below) to get the RSMRST# working properly:

 5.4.5 S5/S4 State
   The device enters the S5/S4 state when the V3.3A_DSW, V1.8A, V5A_DS3, V3.3A_PCH, V0.85A, and V1.00A pins are all enabled and regulating with valid power-good logic. In this state, the RSMRST_PWRGD pin is asserted HIGH.

Thanks!

Phil

Hi Phil,

Thanks for the quick reply, Sorry for the delay.

phil is there any way we can bypass the comparator-C for the power good logic of RSMRST_PWRGD? currently we don't have provision to pull-high the comparator-C(VSC & ENC) on board.

 5.3.1.4 Power Good and Power Fault

above is the text form datasheet which says about power-good masking, but we are not sure if this approach will work and how to access these registers.

please write back your view on this.

Thanks and regards,

Ravi babu

Hi Ravi,

  The 2 register can be access before the PMIC power on since they're powered by RTC power rail. 

  Please make sure RTC power rail is on and using I2C commands to mask those regulators you don't care. 

Thanks!

Phil

Hi Phil,

Thanks for the reply.

sorry for the delayed reply, we were trying to access the TI-PMIC PGMASK reg.

we have connected I2C to PMIC and when we tried to access the vendor-ID reg(0x00) we are getting 0xFF, can you please tell the way to access PMIC I2C.

 we are connecting slaveaddr(L3) pin of PMIC to Ground which make our slave address 0x30 as per the datasheet.

 when we probed the SCL and SDA we are matching with the datasheet recommended I2C sequence.

Probed data:

Datasheet expected sequence.

Regardless of what ever register we tried to access we are getting 0XFFH reply from PMIC.

Please let us know your view in this regard if we are missing out something

Thanks and regards,

Ravi babu

Hi Ravi,

  Did you get the "ACK" after address "0X30" and data "0X00" writing? Can you capture your I2C waveform? 

  This is a legacy part with limit support; I don't see any special needs for I2C operation. 

  Can you check if the RTC LDO is powered on? 

Thanks!

Phil

Hi Phil,

Thank you for the reply. As suggested, we probed the RTC LDO power and found to be 3.3V. 

Phil Yi40 said:

Did you get the "ACK" after address "0X30" and data "0X00" writing? Can you capture your I2C waveform?

Yes, we got acknowledgement after slave address and data bits were written. Please find the attached captured I2C waveform

in the datasheet at section: 5.5.1.1 F/S-Mode Protocol

Attempting to read data from register addresses not listed in this section results in FFh being read out. F/S I 2C operation does not support repeated start.

it is said that repeated start is not supported but in the above I2C diagram it showing repeated start is it the expected behaviour.

Please let us know your view in this regard if we are missing out something.

Thanks and regards,

Ravi babu