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TPS51362: Function of LP# and connection question

Part Number: TPS51362

Hi team, 

Customer is asking if LP# remain low as always, does this affect any performance or anything else? Can be used normally?

Any suggested circuit for this pin? Like external pull up, open drain? or external pull down?

Thanks,

Oliver

  • Hi Oliver,

    Customer could not pull low LP# pin during heavy load and can only be pulled low during system standby to enable long battery life. Pull down signal can control a small MOSFET to pull down LP# pin.

    Hope this helps

    Thanks,

    Nancy

  • Hi Nancy,

    thanks for feedback.

    What if LP# stay at low, what will happen in heavy load conditions? Any side effect?

    BR,

    Scott

  • Hi SHH,

    LP# low is not for heavy load since it will enable ULQ mode with 100uA input current. 100uA input current could not support heavy load to cause no output.

    Thanks,

    Nancy

  • Hi Nancy,

    thanks for comment.

    Will that trigger any protection?

    At the same time, customer would like to ask about the current application range when LP# is pulled low, because it is possible that before LP# changes from low to high due to some time difference, the back-end device may start to operate and load, and customer are worried that this may lead to no output.

    Please help to confirm this situation:

    1. What is the current application range when LP# = low?
    2. What is the allowable time if it exceeds the current in point 1?
    3. Can you help apply for TPS51362 EVM from the your side?

    BR,

    SHH

  • Hi SHH,

    Not trigger any protection. LP# pulling low will turn off all necessary internal circuit to typ 100uA input current. Such a small input current could not support heave loading. So it will be no output.

    1. Only enable LP# low during system standby---no load to save battery life.

    2. As long as in standby mode, LP# can be in low.

    3. We don't have TPS51262EVM available, please use PSpice to check performance.

    Thanks,

    Nancy