TPS564247: Design Review for Phase and Gain margin

Hi Deepak,

1.For the Bode plot, I tested the EVM board and it matches your test.(Figure 1)

2.For the schematic diagram and PCB layout, it is recommended to improve the placement of the output capacitor and inductor (as shown in Figure 2). The placement in the attachment will weaken the filtering effect of LC, in addition, the feedback point of FB should be placed after LC filtering as much as possible, otherwise  a lot of inductor noise will enter the FB pin. Please refer to EVM (Figure 3).

                                                                                     Picture.1

                                                                            Picture.2

                                                                              Picture.3

Best Regards,

Zhou