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CSD18511KCS: Designing with CSD18511KCS

Vijay
Prodigy 170 points
Part Number: CSD18511KCS
Other Parts Discussed in Thread: CSD18510KCS

Hello Team,
I am planning to use the N channel MOSFET CSD18511KCS in one of our applications.
The MOSFET will be used as a switch to on/off  12V 30A of current.
The Gate of the MOSFET will be driven from a gate driver circuit.
So the power dissipation across the FET will be 30A*30A*3.2mΩ= 28.8W which is below the rated 188W of the MOSFET.
The MOSFET will be used as a low-side switch.

But, the RDS of the FET will increase with the increase in the temperature. This (I^2)*R increase will further increase the RDS of the FET.

How to calculate the rise in temperature due to the current flow through the MOSFET?

How to use the RθJC and RθJA values of the MOSFET to calculate the thermal characteristics of the MOSFET?

  • 0
    TI__Mastermind 29535 points

    Hello Vijay,

    Thanks for your interest in TI FETs. The maximum power dissipation in the datasheet is calculated as shown in the blog at the link below. It assumes that the case can be held at 25°C which would require an ideal heat sink. In reality, the actual power dissipation is going to be lower depending on the thermal design (i.e. using a heat sink with airflow) and ambient conditions. The second link below explains how TI tests and specs thermal impedance of our MOSFET packages. The thermal resistance values specified in the datasheet can be used to estimate the junction temperature rise either from ambient (using Rθja) or from case (using Rθjc). Using Rθja in free air with no heatsink, the maximum power dissipation is calculated as follows:

    Pdmax = (Tjmax - Ta)/Rθja = (175°C - 25°C)/62.5°C = 2.4W

    Please note, the power dissipation capability is reduced at higher ambient temperature and you should derate the operating junction temperature from the rated maximum for reliability purposes which further reduces the capability. The TO-220 package can be used with a heat sink and airflow to reduce the effective value of Rθja which increases the power dissipation capability. This is very dependent on the heat sink design and airflow.

    You can use the normalized on resistance in Figure 8 of the datasheet to estimate Rds(on) at elevated junction temperature. Also, you should use the max value of Rds(on) in your calculations for worst case. Since this is just an on/off control, drive the gate of the FET with at least 10V to get the lowest on resistance. You may need to parallel multiple FETs to reduce the overall power dissipation and temperature rise in individual devices. We do have a lower on resistance FET, CSD18510KCS, in the same package. Please let me know if you have any additional questions.

    https://e2e.ti.com/blogs_/b/powerhouse/posts/understanding-mosfet-data-sheets-part-3

    http://e2e.ti.com/blogs_/b/powerhouse/archive/2016/06/10/understanding-mosfet-data-sheets-part-6-thermal-impedance

    Best Regards,

    John Wallace

    TI FET Applications

  • 0 in reply to John Wallace1
    TI__Mastermind 29535 points

    Hi Vijay,

    I checked your calculation and it's off by an order of magnitude: 30A x 30A x 3.2mΩ = 2.88W. There is a simple online load switch FET selection tool at the link below that allows you to compare up to 3 different TI FET solutions based on power loss, package and/or 1k price. I plugged in 30A load current with 5V gate drive and 75°C junction temperature for the CSD18511KCS and it gives a conduction loss of 4.61W. By comparison, for the same conditions, the CSD18510KCS conduction loss is 2.98W. The second link below is an app note with links to all of TI's MOSFET technical information and selection tools.

    https://www.ti.com/tool/LOAD-SWITCH-FET-LOSS-CALC

    https://www.ti.com/lit/an/slvafg3b/slvafg3b.pdf

    Thanks,

    John