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TPS38700: Sequencing Start

Gordon McKenzie
Intellectual 580 points
Part Number: TPS38700

Hello,

I'm trying to get theTPS38700 running but so far we're finding that the sequence outputs just remain low and also the /RST output stays low. We had something that worked with the dev board so wondering if there's anything obvious that's wrong.

I know the dev board uses the automotive -Q1 part while the part we have on the board has the consumer part (TPS38700C04NRGER, i.e. not the -Q1 part). From a check of the datasheets, the only difference seems to be that PEC is initialised to 0x00 in the -Q1 part and initialised to 0xFF in the consumer part. Is there any other change in register programming that is required?

I also note from datasheets that the voltage range for a high input on /SLEEP and ACT signals only goes up to VDD-0.2V. At the moment the signals are direct from a MCU on the same supply so these signals will be very close to VDD. If they are at VDD, would the TPS38700 not recognise this as a high level, and therefore prevent the sequencing from starting when both are driven high?

Fragment of schematic below, if it helps.

Thanks,

Gordon.

  • 0
    TI__Expert 7090 points

    Hello Gordon,

    VBBAT should be connected to a power supply. There should not be an issue driving sleep and act high. Can you connect VBBAt to 3.3V and test again?

    Best,

    Walter

  • 0 in reply to Walter Zollinger
    Intellectual 580 points

    Hello Walter,

    thanks for your reply. I've tried connecting VBBAT to 3V3 as you suggest (shorted VDD pin 17 and VBBAT pin 18) but unfortunately it makes no difference.

    Our debugger output shows the following:

    I (4009) PwrSeq: MODEL_REV 0xa1 REVISION 0xf3
    I (4019) PwrSeq: INT_SRC1 0x4 INT_SRC2 0x23 INT_VENDOR 0xff CTL_STAT 0xff
    I (4019) PwrSeq: WDT_STAT 0 TEST_STAT 0x6e LAST_RST 0xff
    I (4029) PwrSeq: = = = = = = = = = = = = = = = = = = = = = = = = = =
    I (4039) PwrSeq: Check PEC
    I (4039) PwrSeq: CTL_2 setting = 0xc3, PEC bit = 0x3
    I (4039) PwrSeq: Turning off PEC
    I (4049) PwrSeq: INT_SRC1 status before PEC write = 0x4
    I (4049) PCBI2C: Calculate PEC CRC8 for 3 bytes of data
    I (4059) PCBI2C: PEC for 3 bytes of data = 0x25
    I (4069) PwrSeq: INT_SRC1 status after PEC write = 0x4
    I (4069) PwrSeq: CTL_2 setting now = 0
    I (4079) PwrSeq: Write I2C 3 bytes -> register 0x28
    I (4079) PwrSeq: Config data set 0 verified
    I (4089) PwrSeq: Write I2C 3 bytes -> register 0x30
    I (4089) PwrSeq: Config data set 1 verified
    I (4099) PwrSeq: Write I2C 8 bytes -> register 0x33
    I (4099) PwrSeq: Config data set 2 verified
    I (4109) PwrSeq: Write I2C 4 bytes -> register 0x3b
    I (4109) PwrSeq: Config data set 3 verified
    I (4119) PwrSeq: Write I2C 1 bytes -> register 0x3f
    I (4119) PwrSeq: Config data set 4 verified
    I (4129) PwrSeq: Write I2C 8 bytes -> register 0x53
    I (4129) PwrSeq: Config data set 5 verified
    I (4139) PwrSeq: Write I2C 4 bytes -> register 0x5b
    I (4139) PwrSeq: Config data set 6 verified
    I (4149) PwrSeq: PwrSeq init successful
    I (4149) Pulser: PwrSeq initialised
    I (4159) PwrSeq: Turn power on
    I (4159) PwrSeq: Power Up sequence initiated
    E (5179) PwrSeq: Power Up timed out after 1010 ms
    E (5179) Pulser: Error turning FPGA / Analogue power on     

    The first 3 lines show the following register values:

    INT_SRC1 = 0x04

    INT_SRC2 = 0x23

    TEST_STAT = 0x6e

    This seems to indicate that there are multiple faults at startup.

    F_EN bit (in INT_SRC1) is high indicating enable output pin fault (this occurs even when outputs except EM_PD are completely isolated from all other components)

    F_RT_CRC (in INT_SRC2) is high indicating CRC fault

    BIST_VM (in TEST_STAT) is high indicating volatile memory fail

    BIST_NVM (in TEST_STAT) is high indicating non-volatile memory fail

    BIST_L (in TEST_STAT) is high indicating logic test fail

    Can you suggest what might cause us to see these errors, and what we can do to resolve this?

    Thanks,

    Gordon.

  • 0 in reply to Gordon McKenzie
    TI__Expert 7090 points

    Hello Gordon,

    Thank you for you patience, I'm currently reaching out to other members of my team to get this resolved. 

    Thanks,

    Walter

  • 0 in reply to Gordon McKenzie
    TI__Expert 7090 points

    Hello Gordon,

    PEC for both -Q1 and non-Q1 are initialized to 0x00. This might be causing the error. It is a typo in the datasheet for the consumer part that is being fixed.

    Best,

    Walter

  • 0 in reply to Walter Zollinger
    Intellectual 580 points

    The device now runs, after the CLK32 output is disabled, as per this other question:

    https://e2e.ti.com/support/power-management-group/power-management/f/power-management-forum/1280672/tps38700-what-causes-f_en-error

    Please note that the earlier suggestion of connecting VBBAT to 3V3 does not make a difference. I made this change on a board but it did not help. Indeed, now that we have the CLK32 output disabled, sequencing runs on other boards that do not have VBBAT connected to 3V3.