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LMR54410: The selection of the Capacitor for the LMR54410

Conor
Mastermind 8870 points
Part Number: LMR54410

Hi,

Q1.
I have a question regarding the selection of the input capacitor Cin for the LMR54410FDBVR. The datasheet states that the general recommended value for the high-frequency decoupling capacitor Cin is 2.2 μF or more, but is there any problem even if this value is less than 2.2uF? Due to the DC characteristics and withstand voltage rating of the Ceracon, the selected Ceracon may not be 2.2 uF or higher.
　
Q2.
Similar to Q1, the datasheet states that a capacitor with a value of 0.1 μF should be placed for high-frequency filtering, but to what extent can this value also vary?

Background to the question.
Since the capacitor questioned in Q1 and Q2 is a filter for high frequencies, I am wondering whether there is any problem with a design using a Ceracon with an ESR on the order of several mΩ around 1.1 kHz, the frequency of the switching regulator, even if the recommended Ceracon capacitance is not used.

Thanks,

Conor

  • 0
    TI__Genius 9900 points

    Hi Conor,

    For Q1, pls refer to our controller's datasheet. There will be a clearer explanation of input capacitor selection there. Therefore, the input capacitor should be selected according to our recommended standards as much as possible.

    For Q2, the value of the bypass capacitor at the Vin pin can be larger than 0.1uF. But it is generally controlled within 5 times. Thanks.

    Aurora

  • 0 in reply to Aurora Tie
    Mastermind 8870 points

    Hi Aurora,

    Is there any problem with connecting input and bypass capacitors in parallel to meet the actual capacitance under the operating conditions in which they will actually be used? If they are mounted in parallel, are there any precautions that need to be taken in terms of placement?

    Thanks,

    Conor

  • 0 in reply to Conor
    TI__Genius 9900 points

    Hi Conor,

    These capacitors can be connected in parallel. For specific connections, please refer to our EVM user guide. It should be noted that the bypass capacitor (C2) must be close to the Vin pin of the chip. Thanks.

    ...

    Aurora

  • 0 in reply to Aurora Tie
    Mastermind 8870 points

    Hi Aurora,

    Thank you for your response.

    The recommended value for bootstrap capacitors is 0.1 uF, but is there an upper limit recommended like for bypass capacitors? Also is there any problem with a parallel arrangement?

    Thanks,

  • 0 in reply to Conor
    TI__Genius 9900 points

    Hi Conor,

    The voltage on the boot capacitor is generally the recommended value. It can be larger than this value and controlled within 5 to 10 times. Thanks.

    Aurora

  • 0 in reply to Aurora Tie
    Mastermind 8870 points

    Hi Aurora,

    Thank you for your prompt reply. Is there a problem with connecting in parallel?

  • 0 in reply to Conor
    TI__Genius 9900 points

    Hi Conor,

    No. However, it is not recommended to connect too many parallel connections, and the parallel capacitors should be close to the Boot pin of the chip. Thanks.

    Aurora