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TPS38700: What causes F_EN error?

Allan Todd
Prodigy 20 points
Part Number: TPS38700

Our TPS38700 design is getting into a FAILSAFE state when we try to power up (by taking ACT high) if we enable the CLK32 output. If we set an Enable to go high in slot 1 we can see it go high after ~10us, then go low again after ~20us. At this point the registers are showing:

I (15413) PwrSeq: Reg 0x13 (CTL_STAT) = 0x0e
I (15423) PwrSeq: Reg 0x10 (INT_SRC1) = 0x04
I (15423) PwrSeq: Reg 0x16 (EN_STRD1) = 0x02
I (15433) PwrSeq: Reg 0x17 (EN_STRD2) = 0x00

nRST is 0 and nIRQ is 0.

This happens if PWR_CLK32OE is not 0x00. The power sequencer appears to work normally if PWR_CLK32OE is 0x00 (i.e. the external 32k clock is not enabled). 

Can you explain why F_EN is triggered in this case?

  • 0
    TI__Expert 5510 points

    Hello Allan, 

    I just want to confirm what variation of the device is being used during the experiment, is this in reference to the released TPS38700C04NRGER?

    Regards, 

    Oscar Ambriz

  • 0 in reply to Oscar Ambriz
    Prodigy 20 points

    That is correct, it is TPS38700C04NRGER.

  • 0 in reply to Allan Todd
    TI__Expert 5510 points

    Hello Allan, 

    Thank you for the conformation. TPS38700C04NRGER is configured by default to enable the CLK-32 output at the 4th power up slot from when ACT goes high, can you confirm that if no change is made to the parts programming over I2C CLK_32 does function along with the other enable outputs. I am trying to narrow down whether this could be a hardware issue or if the error is due to a change to the programing of the part. 

    Regards, 

    Oscar Ambriz

  • 0 in reply to Oscar Ambriz
    Prodigy 20 points

    When we started testing we had a glitch on the ACT line which appeared to start off the Power Up sequence and we could see EN1 going high: however after a short time EN1 went low again and when we checked the INT_SRC1 register the F_EN bit was set.  At the time we thought this might be an artefact of this short ACT glitch (which has since been resolved).
    We don't have a picture showing what the timing for this was, but I suspect this would match with the 32k clock being activated.
    Our CLK32K output pin is left floating since the clock is not used. Is this a possible cause of a spurious short-circuit warning?

  • 0 in reply to Allan Todd
    TI__Expert 5510 points

    Hello Allan, 

    Thank you for the response, I have a few follow up questions. Firstly, is the CLK32 pin pulled up to a voltage? Secondly, is PIN10 "EN10/NEM_PD" pulled high? this pin is set to its alternate function emergency power down, if this pin is not pulled high it will trigger a sequence down.

    Regards, 

    Oscar Ambriz

  • 0 in reply to Oscar Ambriz
    Prodigy 20 points
    • CLK32 pin is floating, not pulled high
    • nEM_PD pin is driven high (by a GPIO, so we can use it as an emergency powerdown if needed in future). It is high before ACT goes high.
  • 0 in reply to Allan Todd
    TI__Expert 5510 points

    Hello Allan, 

    My suspicion is that the error is due to the CLK32 pin not being pulled to a high state, F_EN is typically seen when the state of a pin does not match the expected. Can you please try your design with CLK32 pulled high and let me know the results. 

    Regards, 

    Oscar Ambriz

  • 0 in reply to Oscar Ambriz
    Prodigy 20 points

    Thank you Oscar

    That is the solution -- if we pull up CLK32 then we can enable that output. In this case we will just make sure it is disabled before activating the Power Sequencer.