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BQ25620: ADC Power Consumption and Latency

Nicholas Zambetti
Prodigy 190 points
Part Number: BQ25620
Other Parts Discussed in Thread: BQ25622

On page 8 of the BQ25620 / BQ25622 datasheet, the following current specifications are given...

IQ_BAT (ADC disabled): 1.5-3uA

IQ_BAT_ADC (ADC enabled): 260uA

I assume this 260uA specification is only meaningful while the ADC is in continuous mode, since one-shot disables the ADC_EN upon completion, this seems clear.

My questions are about how register 0x27 "ADC_Function_Disable_0" affects IQ_BAT_ADC:

1) Is this 260uA specification the quiescent current when all ADC functions are enabled?

2) If only VBAT is enabled, and all other ADC functions are disabled, is the quiescent current reduced?

3) Is there any estimation for how much each ADC function affects IQ_BAT_ADC?

A related question, how does register 0x27 "ADC_Function_Disable_0" affect the temporal resolution of the ADC? With fewer functions enabled, are the readings updated more frequently?

  • 0
    TI__Guru 50191 points

    Hi,

    We are working on it and will get back to you soon.

    Thanks,

    Ning.

  • 0 in reply to Ning T
    TI__Guru 50191 points

    Hi,

    1. Yes. This is for the IC consumption only, TS pin open. There is additional quiescent current beyond the 260uA to bias TS pin.

    2. No.

    3. TS ADC consumes the most power. All the rest are the same.

    Thanks,

    Ning. 

  • 0
    Prodigy 190 points

    Thank you Ning

    If I am understanding your answer correctly, the Iq of the IC with ADC in continuous mode is always at least 260uA, no matter how many channels are enabled. With the TS pin active, this would increase the IC's Iq beyond the 260uA.

    Considering this, what benefit does disabling ADC channels offer?

    If power cannot be saved, and there's no affect on latency, why not just keep all channels active?

  • 0 in reply to Nicholas Zambetti
    TI__Mastermind 23655 points

    Hi Nicholas, 

    Nicholas Zambetti said:
    If I am understanding your answer correctly, the Iq of the IC with ADC in continuous mode is always at least 260uA, no matter how many channels are enabled. With the TS pin active, this would increase the IC's Iq beyond the 260uA.

    Yes your understanding is correct. 

    Nicholas Zambetti said:
    Considering this, what benefit does disabling ADC channels offer?

    Disabling the TS_ADC will save power. For the rest of the channels the benefit of disabling channels is the other channels which remain enabled will be sampled more frequently. Expected ADC conversion time for each measurement is listed on page 15 of the datasheet. 

    When all channels are enabled each signal is samples one after another. When less channels are enabled the time from one measurement to the next will be shorter. The exact timing will depend on the ADC resolution setting (ADC_SAMPLE). 

    Best Regards,

    Garrett 

  • 0 in reply to Garrett Kreger
    Prodigy 190 points

    Thank you Garrett, your explanation is very helpful.